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Travelled to:
1 × USA
Collaborated with:
H.Abbasitabar M.Arjomand H.Sarbazi-Azad
Talks about:
architectur (1) effici (1) level (1) last (1) gpus (1) cach (1) stt (1) ram (1)

Person: Mohammad Hossein Samavatian

DBLP DBLP: Samavatian:Mohammad_Hossein

Contributed to:

DAC 20142014

Wrote 1 papers:

DAC-2014-SamavatianAAS #architecture #performance
An Efficient STT-RAM Last Level Cache Architecture for GPUs (MHS, HA, MA, HSA), p. 6.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.