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Travelled to:
1 × France
1 × USA
Collaborated with:
S.S.Sapatnekar
Talks about:
retim (2) algorithm (1) minimum (1) minarea (1) circuit (1) improv (1) effici (1) level (1) clock (1) larg (1)

Person: Naresh Maheshwari

DBLP DBLP: Maheshwari:Naresh

Contributed to:

DATE 19981998
DAC 19971997

Wrote 2 papers:

DATE-1998-MaheshwariS #performance #scalability
Efficient Minarea Retiming of Large Level-Clocked Circuits (NM, SSS), pp. 840–845.
DAC-1997-MaheshwariS #algorithm
An Improved Algorithm for Minimum-Area Retiming (NM, SSS), pp. 2–7.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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