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Travelled to:
2 × Germany
2 × USA
Collaborated with:
K.Banerjee R.Suaya B.Agrawal S.Lin T.Sherwood S.Mysore G.L.Loi
Talks about:
interconnect (3) substrat (2) frequenc (2) extract (2) layer (2) imped (2) vlsi (2) high (2) introspect (1) processor (1)

Person: Navin Srivastava

DBLP DBLP: Srivastava:Navin

Contributed to:

DATE 20102010
DATE 20082008
ASPLOS 20062006
DAC 20062006

Wrote 5 papers:

DATE-2010-SrivastavaSB #3d #performance
Efficient 3D high-frequency impedance extraction for general interconnects and inductors above a layered substrate (NS, RS, KB), pp. 459–464.
DATE-2008-SrivastavaSB #multi
High-Frequency Mutual Impedance Extraction of VLSI Interconnects In the Presence of a Multi-layer Conducting Substrate (NS, RS, KB), pp. 426–431.
ASPLOS-2006-MysoreASLBS #3d
Introspective 3D chips (SM, BA, NS, SCL, KB, TS), pp. 264–273.
DAC-2006-BanerjeeS #future of #question
Are carbon nanotubes the future of VLSI interconnections? (KB, NS), pp. 809–814.
DAC-2006-LoiASLSB #3d #analysis #performance
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy (GLL, BA, NS, SCL, TS, KB), pp. 991–996.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.