BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
3 × USA
Collaborated with:
K.Banerjee B.Agrawal N.Srivastava T.Sherwood A.Basu V.Wason A.Mehrotra S.Mysore G.L.Loi
Talks about:
perform (2) introspect (1) threshold (1) processor (1) hierarchi (1) simultan (1) thermal (1) circuit (1) analysi (1) voltag (1)

Person: Sheng-Chih Lin

DBLP DBLP: Lin:Sheng=Chih

Contributed to:

ASPLOS 20062006
DAC 20062006
DAC 20042004

Wrote 3 papers:

ASPLOS-2006-MysoreASLBS #3d
Introspective 3D chips (SM, BA, NS, SCL, KB, TS), pp. 264–273.
DAC-2006-LoiASLSB #3d #analysis #performance
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy (GLL, BA, NS, SCL, TS, KB), pp. 991–996.
DAC-2004-BasuLWMB #optimisation #power management
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era (AB, SCL, VW, AM, KB), pp. 884–887.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.