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Travelled to:
4 × USA
Collaborated with:
T.Sherwood S.Mysore N.Srivastava S.Lin K.Banerjee B.Mazloom N.Shrivastava S.Suri G.L.Loi
Talks about:
understand (1) tomographi (1) introspect (1) processor (1) hierarchi (1) thermal (1) perform (1) analysi (1) visual (1) vertic (1)

Person: Banit Agrawal

DBLP DBLP: Agrawal:Banit

Contributed to:

ASPLOS 20082008
ASPLOS 20062006
CGO 20062006
DAC 20062006

Wrote 4 papers:

ASPLOS-2008-MysoreMAS #comprehension #data flow #visualisation
Understanding and visualizing full systems with data flow tomography (SM, BM, BA, TS), pp. 211–221.
ASPLOS-2006-MysoreASLBS #3d
Introspective 3D chips (SM, BA, NS, SCL, KB, TS), pp. 264–273.
CGO-2006-MysoreASSS #adaptation #profiling
Profiling over Adaptive Ranges (SM, BA, TS, NS, SS), pp. 147–158.
DAC-2006-LoiASLSB #3d #analysis #performance
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy (GLL, BA, NS, SCL, TS, KB), pp. 991–996.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.