BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Germany
2 × USA
Collaborated with:
M.Tehranipoor V.Jayaram M.H.Tehranipour M.Nourani
Talks about:
delay (3) test (3) transit (1) pattern (1) generat (1) voltag (1) suppli (1) signal (1) screen (1) integr (1)

Person: Nisar Ahmed

DBLP DBLP: Ahmed:Nisar

Contributed to:

DAC 20072007
DAC 20062006
DATE 20032003

Wrote 3 papers:

DAC-2007-AhmedTJ #design #fault #generative
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design (NA, MT, VJ), pp. 533–538.
DAC-2006-AhmedTJ #fault
Timing-based delay test for screening small delay defects (NA, MT, VJ), pp. 320–325.
DATE-2003-AhmedTN #testing
Extending JTAG for Testing Signal Integrity in SoCs (NA, MHT, MN), pp. 10218–10223.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.