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Travelled to:
1 × USA
Collaborated with:
M.Tan S.Dai Z.Zhang
Talks about:
synthesi (1) pipelin (1) target (1) effici (1) level (1) high (1) fpga (1) area (1)

Person: Ritchie Zhao

DBLP DBLP: Zhao:Ritchie

Contributed to:

DAC 20152015

Wrote 1 papers:

DAC-2015-ZhaoTDZ #pipes and filters #synthesis
Area-efficient pipelining for FPGA-targeted high-level synthesis (RZ, MT, SD, ZZ), p. 6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.