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Travelled to:
2 × USA
Collaborated with:
M.Tan Z.Zhang R.Zhao K.Hao
Talks about:
synthesi (2) pipelin (2) level (2) high (2) target (1) effici (1) flush (1) enabl (1) loop (1) fpga (1)

Person: Steve Dai

DBLP DBLP: Dai:Steve

Contributed to:

DAC 20152015
DAC 20142014

Wrote 2 papers:

DAC-2015-ZhaoTDZ #pipes and filters #synthesis
Area-efficient pipelining for FPGA-targeted high-level synthesis (RZ, MT, SD, ZZ), p. 6.
DAC-2014-DaiTHZ #pipes and filters #synthesis
Flushing-Enabled Loop Pipelining for High-Level Synthesis (SD, MT, KH, ZZ), p. 6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.