Travelled to:1 × France
3 × USA
Collaborated with:X.Wen K.Miyase I.Pomeranz K.Kinoshita S.M.Reddy M.Aso H.Furukawa Y.Yamato T.Suzuki Y.Ohsumi K.K.Saluja M.Fukunaga T.Maeda S.Hamada Y.Sato
Talks about:test (4) generat (2) effect (2) speed (2) scan (2) path (2) transit (1) process (1) compact (1) circuit (1)
Person: Seiji Kajihara
DBLP: Kajihara:Seiji
Contributed to:
2011
200720051993Wrote 4 papers:
- DATE-2011-MiyaseWAFYK #generative #testing
- Transition-Time-Relation based capture-safety checking for at-speed scan test generation (KM, XW, MA, HF, YY, SK), pp. 895–898.
- DAC-2007-WenMSKOS #effectiveness #reduction #testing
- Critical-Path-Aware X-Filling for Effective IR-Drop Reduction in At-Speed Scan Testing (XW, KM, TS, SK, YO, KKS), pp. 527–532.
- DAC-2005-KajiharaFWMHS #process
- Path delay test compaction with process variation tolerance (SK, MF, XW, TM, SH, YS), pp. 845–850.
- DAC-1993-KajiharaPKR #effectiveness #fault #generative #logic #testing
- Cost-Effective Generation of Minimal Test Sets for Stuck-at Faults in Combinational Logic Circuits (SK, IP, KK, SMR), pp. 102–106.