Travelled to:2 × France
3 × USA
Collaborated with:A.Nandi ∅ P.Agrawal E.M.Clarke S.Michaylov D.E.Long P.E.Allen
Talks about:parthenon (2) parallel (2) theorem (2) circuit (2) prover (2) memori (2) model (2) claus (2) horn (2) non (2)
Person: Soumitra Bose
DBLP: Bose:Soumitra
Contributed to:
20042002
1992
1989
1988Wrote 5 papers:
- DATE-v1-2004-BoseN #array #memory management #modelling
- Extraction of Schematic Array Models for Memory Circuits (SB, AN), pp. 570–577.
- DATE-2002-Bose #automation #modelling
- Automated Modeling of Custom Digital Circuits for Test (SB), pp. 954–961.
- DAC-1992-BoseA #concurrent #fault #logic #memory management #message passing #multi #simulation
- Concurrent Fault Simulation of Logic Gates and Memory Blocks on Message Passing Multicomputers (SB, PA), pp. 332–335.
- LICS-1989-BoseCLM #horn clause #named #parallel #proving #theorem proving
- PARTHENON: A Parallel Theorem Prover for Non-Horn Clauses (SB, EMC, DEL, SM), pp. 80–89.
- CADE-1988-AllenBCM #horn clause #named #parallel #proving #theorem proving
- PARTHENON: A Parallel Theorem Prover for Non-Horn Clauses (PEA, SB, EMC, SM), pp. 764–765.