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Travelled to:
1 × Germany
2 × France
Collaborated with:
A.Yakovlev R.Al-Dujaily A.Yakovlev A.Karkar X.Wang N.Dahir M.Palesi Y.Li K.Tong J.Ng A.K.Singh G.Tarawneh F.Xia K.Tong B.Zhao M.Yang Y.Jiang M.Daneshtalab
Talks about:
network (4) chip (4) mani (3) communic (2) system (2) surfac (2) alloc (2) adapt (2) wire (2) wave (2)

Person: Terrence S. T. Mak

DBLP DBLP: Mak:Terrence_S=_T=

Contributed to:

DATE 20152015
PDP 20152015
DATE 20142014
PDP 20142014
DATE 20112011

Wrote 7 papers:

DATE-2015-KarkarTMY #communication #distributed #multi
Mixed wire and surface-wave communication fabrics for decentralized on-chip multicasting (AK, KFT, TSTM, AY), pp. 794–799.
PDP-2015-NgWSM #manycore #named #performance #resource management #runtime
DeFrag: Defragmentation for Efficient Runtime Resource Allocation in NoC-Based Many-core Systems (JN, XW, AKS, TSTM), pp. 345–352.
DATE-2014-KarkarDATMY #architecture #communication #hybrid
Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip (AK, ND, RAD, KT, TSTM, AY), pp. 1–4.
DATE-2014-WangZMYJDP #adaptation #manycore
Adaptive power allocation for many-core systems inspired from multiagent auction model (XW, BZ, TSTM, MY, YJ, MD, MP), pp. 1–4.
PDP-2014-DahirTMAY #adaptation #design #implementation
Design and Implementation of Dynamic Thermal-Adaptive Routing Strategy for Networks-on-Chip (ND, GT, TSTM, RAD, AY), pp. 384–391.
DATE-2011-Al-DujailyMXYP #concurrent #detection #network #runtime #transitive #using
Run-time deadlock detection in networks-on-chip using coupled transitive closure networks (RAD, TSTM, FX, AY, MP), pp. 497–502.
DATE-2011-LiMY #independence
Redressing timing issues for speed-independent circuits in deep submicron age (YL, TSTM, AY), pp. 1376–1381.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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