Travelled to:3 × USA
Collaborated with:N.Koike K.Tomita N.Nomizu A.Yamada S.Kato K.Ohmori S.Takasaki H.Ishikura T.Aoyama K.Hasegawa S.Sato T.Nakazawa
Talks about:system (3) simul (3) logic (3) level (3) mix (3) verif (2) digit (2) larg (2) hal (2) hierarch (1)
Person: Tohru Sasaki
DBLP: Sasaki:Tohru
Contributed to:
1986198319811980Wrote 4 papers:
- DAC-1986-TakasakiSNIK #hardware #logic #simulation
- HAL II: a mixed level hardware logic simulation system (ST, TS, NN, HI, NK), pp. 581–587.
- DAC-1983-SasakiKOT #hardware #logic #named
- HAL: A block level HArdware Logic simulator (TS, NK, KO, KT), pp. 150–156.
- DAC-1981-SasakiYAHKS #design #scalability #verification
- Hierarchical design verification for large digital systems (TS, AY, TA, KH, SK, SS), pp. 105–112.
- DAC-1980-SasakiYKNTN #logic #named #scalability #verification
- MIXS: A mixed level simulator for large digital system logic verification (TS, AY, SK, TN, KT, NN), pp. 626–633.