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Travelled to:
1 × Cyprus
1 × Estonia
1 × Spain
2 × Germany
2 × Italy
3 × France
6 × USA
Collaborated with:
D.Kröning L.Haller C.Urban S.Ramesh M.Purandare A.Sowmya M.Brain A.Griggio C.Y.Cho D.Song M.Tautschnig G.Weissenbacher M.Sousa C.Rodríguez D.Kroening K.Avnit S.Parameswaran S.Sonalkar N.Chandra B.Vijayalakshmi
Talks about:
abstract (8) interpret (4) interpol (4) model (4) conflict (3) driven (3) verif (3) protocol (2) program (2) point (2)

Person: Vijay D'Silva

DBLP DBLP: D'Silva:Vijay

Contributed to:

CADE 20152015
CAV 20152015
POPL 20142014
ASE 20132013
POPL 20132013
SAS 20132013
VMCAI 20132013
SAS 20122012
TACAS 20122012
ESOP 20102010
VMCAI 20102010
DATE 20092009
DATE 20082008
VMCAI 20082008
CAV 20042004
DATE v1 20042004
CAV (2) 20172017

Wrote 18 papers:

CADE-2015-DSilvaU #abstract interpretation #automation #deduction
Abstract Interpretation as Automated Deduction (VD, CU), pp. 450–464.
CAV-2015-DSilvaU #termination
Conflict-Driven Conditional Termination (VD, CU), pp. 271–286.
POPL-2014-DSilvaHK #satisfiability
Abstract satisfaction (VD, LH, DK), pp. 139–150.
ASE-2013-ChoDS #bound #composition #model checking #named #source code
BLITZ: Compositional bounded model checking for real-world programs (CYC, VD, DS), pp. 136–146.
POPL-2013-DSilvaHK #learning
Abstract conflict driven learning (VD, LH, DK), pp. 143–154.
SAS-2013-BrainDGHK #float #source code #verification
Interpolation-Based Verification of Floating-Point Programs with Abstract CDCL (MB, VD, AG, LH, DK), pp. 412–432.
VMCAI-2013-BrainDHGK #abstract interpretation
An Abstract Interpretation of DPLL(T) (MB, VD, LH, AG, DK), pp. 455–475.
VMCAI-2013-DSilvaK #abstraction #syntax
Abstraction of Syntax (VD, DK), pp. 396–413.
SAS-2012-DSilvaHK #satisfiability
Satisfiability Solvers Are Static Analysers (VD, LH, DK), pp. 317–333.
TACAS-2012-DSilvaHKT #analysis #bound #learning
Numeric Bounds Analysis with Conflict-Driven Learning (VD, LH, DK, MT), pp. 48–63.
ESOP-2010-DSilva #abstract interpretation
Propositional Interpolation and Abstract Interpretation (VD), pp. 185–204.
Interpolant Strength (VD, DK, MP, GW), pp. 129–145.
DATE-2009-DSilvaK #detection #fixpoint #multi
Fixed points for multi-cycle path detection (VD, DK), pp. 1710–1715.
DATE-2008-AvnitDSRP #approach #formal method #problem #protocol
A Formal Approach To The Protocol Converter Problem (KA, VD, AS, SR, SP), pp. 294–299.
VMCAI-2008-DSilvaPK #approximate #model checking #refinement
Approximation Refinement for Interpolation-Based Model Checking (VD, MP, DK), pp. 68–82.
CAV-2004-RameshSDCV #modelling #tool support #verification
A Toolset for Modelling and Verification of GALS Systems (SR, SS, VD, NC, BV), pp. 506–509.
DATE-v1-2004-DSilvaRS #architecture #automaton #communication #framework #modelling #protocol #verification
Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures (VD, SR, AS), pp. 390–395.
CAV-2017-SousaRDK #abstract interpretation
Abstract Interpretation with Unfoldings (MS, CR, VD, DK), pp. 197–216.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.