BibSLEIGH corpus
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BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × China
1 × France
7 × USA
Collaborated with:
D.M.Brooks Y.Zhu G.Wei M.D.Smith G.H.Holloway M.S.Gupta Yuhao Zhu 0001 J.Leng Y.Zu M.Halpern S.Campanoni D.Connors R.Cohn P.Bailis S.Gandhi M.I.Seltzer T.Moseley A.Shye D.Grunwald R.Peri T.M.Jones C.Luk R.S.Cohn R.Muth H.Patil A.Klauser P.G.Lowney S.Wallace K.M.Hazelwood
Talks about:
voltag (4) web (4) energi (3) effici (3) mobil (3) nois (3) instrument (2) processor (2) parallel (2) softwar (2)

Person: Vijay Janapa Reddi

DBLP DBLP: Reddi:Vijay_Janapa

Contributed to:

HPCA 20152015
HPCA 20132013
CGO 20122012
DAC 20112011
DAC 20092009
DATE 20092009
HPCA 20092009
CGO 20072007
PLDI 20052005
PLDI 20162016

Wrote 12 papers:

HPCA-2015-LengZR #architecture #gpu
GPU voltage noise: Characterization and hierarchical smoothing of spatial and temporal voltage noise interference in GPU architectures (JL, YZ, VJR), pp. 161–173.
HPCA-2015-ZhuHR #energy #mobile #scheduling #web
Event-based scheduling for energy-efficient QoS (eQoS) in mobile Web applications (YZ, MH, VJR), pp. 137–149.
HPCA-2013-ZhuR #energy #mobile #web
High-performance and energy-efficient mobile web browsing on big/little systems (YZ, VJR), pp. 13–24.
CGO-2012-CampanoniJHRWB #automation #named #parallel #source code
HELIX: automatic parallelization of irregular programs for chip multiprocessing (SC, TMJ, GHH, VJR, GYW, DMB), pp. 84–93.
DAC-2011-BailisRGBS #injection #named
Dimetrodon: processor-level preventive thermal management via idle cycle injection (PB, VJR, SG, DMB, MIS), pp. 89–94.
DAC-2009-ReddiGSWBC #challenge #hardware #reliability #stack
Software-assisted hardware reliability: abstracting circuit-level challenges to the software stack (VJR, SC, MSG, MDS, GYW, DMB), pp. 788–793.
DATE-2009-GuptaRHWB #approach
An event-guided approach to reducing voltage noise in processors (MSG, VJR, GHH, GYW, DMB), pp. 160–165.
HPCA-2009-ReddiGHWSB #predict #using
Voltage emergency prediction: Using signatures to reduce operating margins (VJR, MSG, GHH, GYW, MDS, DMB), pp. 18–29.
CGO-2007-MoseleySRGP #parallel #profiling
Shadow Profiling: Hiding Instrumentation Costs with Parallelism (TM, AS, VJR, DG, RP), pp. 198–208.
CGO-2007-ReddiCCS #persistent #reuse
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications (VJR, DC, RC, MDS), pp. 74–88.
PLDI-2005-LukCMPKLWRH #named #program analysis #tool support
Pin: building customized program analysis tools with dynamic instrumentation (CKL, RSC, RM, HP, AK, PGL, SW, VJR, KMH), pp. 190–200.
PLDI-2016-ZhuR #energy #mobile #named #web
GreenWeb: language extensions for energy-efficient mobile web computing (YZ0, VJR), pp. 145–160.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.