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Travelled to:
2 × USA
Collaborated with:
K.K.Parhi S.S.Sapatnekar
Talks about:
minflotransit (1) transistor (1) synthesi (1) circuit (1) voltag (1) suppli (1) power (1) vlsi (1) tool (1) size (1)

Person: Vijay Sundararajan

DBLP DBLP: Sundararajan:Vijay

Contributed to:

DAC 20002000
DAC 19991999

Wrote 2 papers:

DAC-2000-SundararajanSP #named
MINFLOTRANSIT: min-cost flow based transistor sizing tool (VS, SSS, KKP), pp. 649–664.
DAC-1999-SundararajanP #power management #synthesis #using
Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages (VS, KKP), pp. 72–75.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.