BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × France
1 × USA
Collaborated with:
X.Wang J.Xu W.Zhang X.Wu M.Nikdast Z.Wang Z.Wang Y.Xie Q.Li W.Liu
Talks about:
power (2) nois (2) chip (2) crosstalk (1) parasit (1) network (1) capacit (1) analysi (1) memori (1) ground (1)

Person: Yaoyao Ye

DBLP DBLP: Ye:Yaoyao

Contributed to:

DATE 20132013
DAC 20102010

Wrote 2 papers:

DATE-2013-WangXZWYWNW #using
Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories (XW, JX, WZ, XW, YY, ZW, MN, ZW), pp. 1221–1224.
DAC-2010-XieNXZLWYWL #analysis #fault
Crosstalk noise and bit error rate analysis for optical network-on-chip (YX, MN, JX, WZ, QL, XW, YY, XW, WL), pp. 657–660.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.