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Travelled to:
1 × USA
Collaborated with:
C.Lin J.Lin C.Huang S.Chang
Talks about:
placement (1) capacitor (1) systemat (1) mismatch (1) centroid (1) circuit (1) random (1) integr (1) consid (1) common (1)

Person: Yen-Chih Chiu

DBLP DBLP: Chiu:Yen=Chih

Contributed to:

DAC 20112011

Wrote 1 papers:

DAC-2011-LinLCHC #random
Common-centroid capacitor placement considering systematic and random mismatches in analog integrated circuits (CWL, JML, YCC, CPH, SJC), pp. 528–533.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.