Travelled to:1 × France
1 × Germany
2 × USA
Collaborated with:S.K.Lim D.B.Limbrick J.Yang K.Athikulwongse D.Z.Pan Y.J.Kim G.Huang M.S.Bakir Y.K.Joshi A.G.Fedorov
Talks about:power (3) transistor (1) technolog (1) distribut (1) monolith (1) thermal (1) network (1) densiti (1) benefit (1) analysi (1)
Person: Young-Joon Lee
DBLP: Lee:Young=Joon
Contributed to:
2014
201320102009Wrote 4 papers:
- DATE-2014-LeeL #3d #gpu #on the #reduction
- On GPU bus power reduction with 3D IC technologies (YJL, SKL), pp. 1–6.
- DAC-2013-LeeLL #3d
- Power benefit study for ultra-high density transistor-level monolithic 3D ICs (YJL, DBL, SKL), p. 10.
- DAC-2010-YangALLP #3d #analysis #layout #optimisation
- TSV stress aware timing analysis with applications to 3D-IC layout optimization (JSY, KA, YJL, SKL, DZP), pp. 803–806.
- DATE-2009-LeeKHBJFL #3d #co-evolution #design #network
- Co-design of signal, power, and thermal distribution networks for 3D ICs (YJL, YJK, GH, MSB, YKJ, AGF, SKL), pp. 610–615.