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Used together with:
cach (7)
perform (5)
base (3)
high (3)
data (3)

Stem cmps$ (all stems)

19 papers:

DACDAC-2015-TeimouriTS #challenge
Revisiting accelerator-rich CMPs: challenges and solutions (NT, HT, GS), p. 6.
SACSAC-2015-KapoorDC #capacity #energy #performance #reduction
Static energy reduction by performance linked cache capacity management in tiled CMPs (HKK, SD, SC), pp. 1913–1918.
DATEDATE-2014-OrtinGVIV
Dynamic construction of circuits for reactive traffic in homogeneous CMPs (MO, DSG, MV, CI, VV), pp. 1–4.
DATEDATE-2014-ShenQ #quality #scalability
Contention aware frequency scaling on CMPs with guaranteed quality of service (HS, QQ), pp. 1–6.
DACDAC-2012-CongGGGR #architecture
Architecture support for accelerator-rich CMPs (JC, MAG, MG, BG, GR), pp. 843–849.
DACDAC-2012-JogMXXNID #architecture #performance
Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs (AJ, AKM, CX, YX, VN, RI, CRD), pp. 243–252.
HPCAHPCA-2012-SundararajanPJTF #clustering #energy
Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs (KTS, VP, TMJ, NPT, BF), pp. 311–322.
DATEDATE-2011-AsadiniaMTS #using
Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links (MA, MM, AT, HSA), pp. 413–418.
HPCAHPCA-2011-GuLKS #named
MOPED: Orchestrating interprocess message data on CMPs (JG, SSL, RK, YS), pp. 111–120.
HPCAHPCA-2011-JiangMZIFSMBD #named #scheduling #symmetry
ACCESS: Smart scheduling for asymmetric cache CMPs (XJ, AKM, LZ, RI, ZF, SS, SM, PB, CRD), pp. 527–538.
HPDCHPDC-2011-AlvarezBGMNA #design #replication
Design space exploration for aggressive core replication schemes in CMPs (LA, RB, MG, XM, NN, EA), pp. 269–270.
DACDAC-2010-HuXTHQS #embedded #migration #process
Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation (JH, CJX, WCT, YH, MQ, EHMS), pp. 350–355.
DACDAC-2009-KandemirOM #concurrent #thread
Dynamic thread and data mapping for NoC based CMPs (MTK, ÖÖ, SPM), pp. 852–857.
HPCAHPCA-2009-DasEMVD #design #evaluation
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs (RD, SE, AKM, NV, CRD), pp. 175–186.
HPCAHPCA-2009-Qureshi #adaptation #robust
Adaptive Spill-Receive for robust high-performance caching in CMPs (MKQ), pp. 45–54.
HPCAHPCA-2009-SunDXLC #3d #architecture #novel
A novel architecture of the 3D stacked MRAM L2 cache for CMPs (GS, XD, YX, JL, YC), pp. 239–249.
ASPLOSASPLOS-2008-SulemanQP #concurrent #execution #multi #power management #thread
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs (MAS, MKQ, YNP), pp. 277–286.
HPCAHPCA-2008-FenschC #hardware
An OS-based alternative to full hardware coherence on tiled CMPs (CF, MC), pp. 355–366.
ICDARICDAR-1993-GaoHQS
A color map processing system PU-CMPS (QG, JH, GQ, QS), pp. 874–877.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.