Probabilistic CTSS: Analysis of Timing Error Probability in Asynchronous Logic Circuits
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Yutaka Deguchi, Nagisa Ishiura, Shuzo Yajima
Probabilistic CTSS: Analysis of Timing Error Probability in Asynchronous Logic Circuits
DAC, 1991.

DAC 1991
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@inproceedings{DAC-1991-DeguchiIY,
	author        = "Yutaka Deguchi and Nagisa Ishiura and Shuzo Yajima",
	booktitle     = "{Proceedings of the 28th Design Automation Conference}",
	doi           = "10.1145/127601.127745",
	isbn          = "0-89791395-7",
	pages         = "650--655",
	publisher     = "{ACM}",
	title         = "{Probabilistic CTSS: Analysis of Timing Error Probability in Asynchronous Logic Circuits}",
	year          = 1991,
}

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