Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
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Feng Gao, John P. Hayes
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
DAC, 2005.

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@inproceedings{DAC-2005-GaoH,
	author        = "Feng Gao and John P. Hayes",
	booktitle     = "{Proceedings of the 42nd Design Automation Conference}",
	doi           = "10.1145/1065579.1065593",
	isbn          = "1-59593-058-2",
	pages         = "31--36",
	publisher     = "{ACM}",
	title         = "{Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages}",
	year          = 2005,
}

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