Modeling Simultaneous Switching Noise-Induced Jitter for System-on-Chip Phase-Locked Loops
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Henry H. Y. Chan, Zeljko Zilic
Modeling Simultaneous Switching Noise-Induced Jitter for System-on-Chip Phase-Locked Loops
DAC, 2007.

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@inproceedings{DAC-2007-ChanZ,
	author        = "Henry H. Y. Chan and Zeljko Zilic",
	booktitle     = "{Proceedings of the 44th Design Automation Conference}",
	doi           = "10.1145/1278480.1278591",
	pages         = "430--435",
	publisher     = "{IEEE}",
	title         = "{Modeling Simultaneous Switching Noise-Induced Jitter for System-on-Chip Phase-Locked Loops}",
	year          = 2007,
}

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