System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC
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Glenn Leary, Weijia Che, Karam S. Chatha
System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC
DAC, 2012.

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@inproceedings{DAC-2012-LearyCC,
	author        = "Glenn Leary and Weijia Che and Karam S. Chatha",
	booktitle     = "{Proceedings of the 49th Annual Design Automation Conference}",
	doi           = "10.1145/2228360.2228481",
	isbn          = "978-1-4503-1199-1",
	pages         = "672--677",
	publisher     = "{ACM}",
	title         = "{System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC}",
	year          = 2012,
}

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