BibSLEIGH corpus
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Travelled to:
1 × Germany
2 × USA
Collaborated with:
K.S.Chatha G.Leary A.Panda
Talks about:
stream (4) processor (3) multicor (3) memori (3) scratchpad (2) program (2) system (2) compil (2) retim (2) embed (2)

Person: Weijia Che

DBLP DBLP: Che:Weijia

Contributed to:

DAC 20122012
DAC 20112011
DATE 20102010

Wrote 4 papers:

DAC-2012-CheC #embedded #manycore
Unrolling and retiming of stream applications onto embedded multicore processors (WC, KSC), pp. 1272–1277.
DAC-2012-LearyCC #architecture #memory management #synthesis
System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC (GL, WC, KSC), pp. 672–677.
DAC-2011-CheC #compilation #embedded #manycore #memory management #source code
Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming (WC, KSC), pp. 122–127.
DATE-2010-ChePC #compilation #manycore #source code
Compilation of stream programs for multicore processors that incorporate scratchpad memories (WC, AP, KSC), pp. 1118–1123.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.