Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture
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Sang Phill Park, Sumeet Kumar Gupta, Niladri Narayan Mojumder, Anand Raghunathan, Kaushik Roy
Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture
DAC, 2012.

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@inproceedings{DAC-2012-ParkGMRR,
	author        = "Sang Phill Park and Sumeet Kumar Gupta and Niladri Narayan Mojumder and Anand Raghunathan and Kaushik Roy",
	booktitle     = "{Proceedings of the 49th Annual Design Automation Conference}",
	doi           = "10.1145/2228360.2228447",
	isbn          = "978-1-4503-1199-1",
	pages         = "492--497",
	publisher     = "{ACM}",
	title         = "{Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture}",
	year          = 2012,
}

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