BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × France
2 × Germany
2 × USA
Collaborated with:
K.Roy C.Lu V.Raghunathan S.K.Gupta N.N.Mojumder J.P.Kulkarni K.Kim A.Raghunathan
Talks about:
energi (3) voltag (2) effici (2) ultra (2) scale (2) power (2) optim (2) micro (2) mram (2) stt (2)

Person: Sang Phill Park

DBLP DBLP: Park:Sang_Phill

Contributed to:

DAC 20122012
DATE 20122012
DATE 20112011
DATE 20102010
DAC 20082008

Wrote 5 papers:

DAC-2012-ParkGMRR #architecture #design #energy #performance #using
Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture (SPP, SKG, NNM, AR, KR), pp. 492–497.
DATE-2012-GuptaPMR #optimisation
Layout-aware optimization of stt mrams (SKG, SPP, NNM, KR), pp. 1455–1458.
DATE-2011-LuPRR #energy #optimisation
Stage number optimization for switched capacitor power converters in micro-scale energy harvesting (CL, SPP, VR, KR), pp. 770–775.
DATE-2010-LuPRR #energy #performance #transducer
Efficient power conversion for ultra low voltage micro scale energy transducers (CL, SPP, VR, KR), pp. 1602–1607.
DAC-2008-KulkarniKPR #array #process
Process variation tolerant SRAM array for ultra low voltage applications (JPK, KK, SPP, KR), pp. 108–113.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.