Travelled to:
1 × Germany
2 × USA
Collaborated with:
K.Roy S.P.Park N.N.Mojumder J.P.Kulkarni A.Raghunathan
Talks about:
circuit (2) devic (2) mram (2) stt (2) architectur (1) technolog (1) interact (1) layout (1) improv (1) energi (1)
Person: Sumeet Kumar Gupta
DBLP: Gupta:Sumeet_Kumar
Contributed to:
Wrote 3 papers:
- DAC-2012-ParkGMRR #architecture #design #energy #performance #using
- Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture (SPP, SKG, NNM, AR, KR), pp. 492–497.
- DATE-2012-GuptaPMR #optimisation
- Layout-aware optimization of stt mrams (SKG, SPP, NNM, KR), pp. 1455–1458.
- DAC-2009-RoyKG #interactive
- Device/circuit interactions at 22nm technology node (KR, JPK, SKG), pp. 97–102.