BibSLEIGH — Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset

Uwe Fassnacht, Jürgen Schietke
Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset
DATE, 1998.

DATE 1998

@inproceedings{DATE-1998-FassnachtS,
	author        = "Uwe Fassnacht and Jürgen Schietke",
	booktitle     = "{Proceedings of the Third Conference on Design, Automation and Test in Europe}",
	doi           = "10.1109/DATE.1998.655876",
	pages         = "325--331",
	publisher     = "{IEEE Computer Society}",
	title         = "{Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset}",
	year          = 1998,
}

Uwe Fassnacht, Jürgen SchietkeTiming Analysis and Optimization of a High-Performance CMOS Processor ChipsetDATE, 1998.

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Uwe Fassnacht, Jürgen Schietke
Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset
DATE, 1998.