Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits
DATE, 2005.
@inproceedings{DATE-2005-MukhopadhyayBR,
author = "Saibal Mukhopadhyay and Swarup Bhunia and Kaushik Roy",
booktitle = "{Proceedings of the Ninth Conference on Design, Automation and Test in Europe}",
doi = "10.1109/DATE.2005.210",
isbn = "0-7695-2288-2",
pages = "224--229",
publisher = "{IEEE Computer Society}",
title = "{Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits}",
year = 2005,
}