BibSLEIGH — Swarup

Travelled to:

4 × France
5 × Germany
7 × USA

Collaborated with:

K.Roy S.Paul A.Raychowdhury Y.Zheng H.Mahmoodi-Meimand S.Mukhopadhyay N.Banerjee S.Ghosh A.Basak S.Narasimhan R.S.Chakraborty L.Leinweber D.Mukhopadhyay F.G.Wolff M.Hashemian Y.Zhou L.Chiou J.Segura S.Rajgopal M.Mehregany J.Jang J.Park S.Ray J.Yang R.Karam R.Puri X.Wang S.Ali C.A.Papachristou B.C.Paul Q.Chen A.Datta H.Li Y.Chen T.N.Vijaykumar V.Ranganathan T.He R.Yang P.X.Feng W.Yueh D.B.Roy A.R.Krishna T.Lee

Talks about:

power (9) use (8) analysi (7) comput (6) synthesi (4) current (4) dynam (4) gate (4) base (4) low (4)

Person: Swarup Bhunia

DBLP: Bhunia:Swarup

Contributed to:

2015

2014

2013

2011

2008

2007

2006

2005

2004

2003

2002

Wrote 26 papers:

DAC-2015-JangPGB #self: Self-correcting STTRAM under magnetic field attacks (JWJ, JP, SG, SB), p. 6.
DAC-2015-RayYBB #correctness #design #security #validation: Correctness and security at odds: post-silicon validation of modern SoC designs (SR, JY, AB, SB), p. 6.
DAC-2014-ZhengBB #analysis #identification #named #robust #towards: CACI: Dynamic Current Analysis Towards Robust Recycled Chip Identification (YZ, AB, SB), p. 6.
DATE-2014-BhuniaRHRYMF #logic #towards: Toward ultralow-power computing at exteme with silicon carbide (SiC) nanoelectromechanical logic (SB, VR, TH, SR, RY, MM, PXLF), pp. 1–6.
DATE-2014-PaulKBP #energy #hardware #memory management: Energy-efficient hardware acceleration through computing in the memory (SP, RK, SB, RP), pp. 1–6.
DAC-2013-WangYRNZMMB #design #grid #power management: Role of power grid in side channel attack and power-grid-aware secure design (XW, WY, DBR, SN, YZ, SM, DM, SB), p. 9.
DAC-2013-ZhengHB #array #embedded #named #physics #robust: RESP: a robust physical unclonable function retrofitted into embedded SRAM array (YZ, MH, SB), p. 9.
DATE-2011-AliCMB #encryption #hardware #multi #security: Multi-level attacks: An emerging security concern for cryptographic hardware (SA, RSC, DM, SB), pp. 1176–1179.
DATE-2011-WangNKWRLMB #configuration management #using: High-temperature (>500°C) reconfigurable computing using silicon carbide NEMS switches (XW, SN, ARK, FGW, SR, THL, MM, SB), pp. 1065–1070.
DAC-2008-NarasimhanPB: Collective computing based on swarm intelligence (SN, SP, SB), pp. 349–350.
DAC-2008-PaulB #configuration management #memory management #performance #resource management #using: Reconfigurable computing using content addressable memory for improved performance and resource usage (SP, SB), pp. 786–791.
DATE-2008-LeinweberB #clustering #composition #fine-grained #reduction: Fine-Grained Supply Gating Through Hypergraph Partitioning and Shannon Decomposition for Active Power Reduction (LL, SB), pp. 373–378.
DATE-2008-WolffPBC #analysis #detection #problem #towards: Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme (FGW, CAP, SB, RSC), pp. 1362–1365.
DATE-2008-ZhouPB #analysis #generative #metric #modelling #using: Harvesting Wasted Heat in a Microprocessor Using Thermoelectric Generators: Modeling, Analysis and Measurement (YZ, SP, SB), pp. 98–103.
DATE-2007-GhoshBR #adaptation #scheduling #synthesis #using: Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling (SG, SB, KR), pp. 1532–1537.
DATE-2006-BanerjeeRMB #fine-grained #logic #power management #synthesis #using: Low power synthesis of dynamic logic circuits using fine-grained clock gating (NB, KR, HMM, SB), pp. 862–867.
DATE-2006-RaychowdhuryPBR #case study #comparative #power management: Ultralow power computing with sub-threshold leakage: a comparative study of bulk and SOI technologies (AR, BCP, SB, KR), pp. 856–861.
DAC-2005-BhuniaBCMR #approach #novel #power management #reduction #synthesis #using: A novel synthesis approach for active leakage power reduction using dynamic supply gating (SB, NB, QC, HMM, KR), pp. 479–484.
DATE-2005-BhuniaMRR #novel #testing: A Novel Low-overhead Delay Testing Technique for Arbitrary Two-Pattern Test Application (SB, HMM, AR, KR), pp. 1136–1141.
DATE-2005-DattaBMBR #design #modelling #pipes and filters #process #statistics: Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies (AD, SB, SM, NB, KR), pp. 926–931.
DATE-2005-MukhopadhyayBR #analysis #logic #modelling: Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits (SM, SB, KR), pp. 224–229.
DATE-v1-2004-BhuniaRR #analysis #using: Trim Bit Setting of Analog Filters Using Wavelet-Based Supply Current Analysis (SB, AR, KR), pp. 704–705.
DATE-2003-ChiouBR #multi #power management #synthesis: Synthesis of Application-Specific Highly-Efficient Multi-Mode Systems for Low-Power Applications (LYC, SB, KR), pp. 10096–10103.
HPCA-2003-LiBCVR #reduction: Deterministic Clock Gating for Microprocessor Power Reduction (HL, SB, YC, TNV, KR), pp. 113–122.
DAC-2002-BhuniaRS #analysis #detection #fault #locality #novel: A novel wavelet transform based transient current analysis for fault detection and localization (SB, KR, JS), pp. 361–366.
DATE-2002-BhuniaR #analysis #detection #fault #using: Fault Detection and Diagnosis Using Wavelet Based Transient Current Analysis (SB, KR), p. 1118.