BibSLEIGH — Low power synthesis of dynamic logic circuits using fine-grained clock gating

Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Meimand, Swarup Bhunia
Low power synthesis of dynamic logic circuits using fine-grained clock gating
DATE, 2006.

DATE 2006

@inproceedings{DATE-2006-BanerjeeRMB,
	author        = "Nilanjan Banerjee and Kaushik Roy and Hamid Mahmoodi-Meimand and Swarup Bhunia",
	booktitle     = "{Proceedings of the 10th Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/1131724",
	pages         = "862--867",
	publisher     = "{European Design and Automation Association, Leuven, Belgium}",
	title         = "{Low power synthesis of dynamic logic circuits using fine-grained clock gating}",
	year          = 2006,
}

Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Meimand, Swarup BhuniaLow power synthesis of dynamic logic circuits using fine-grained clock gatingDATE, 2006.

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Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Meimand, Swarup Bhunia
Low power synthesis of dynamic logic circuits using fine-grained clock gating
DATE, 2006.