Application of Workflow Petri Nets to Modeling of Formal Verification Processes in Design Flow of Digital Integrated Circuits
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Katharina Weinberger, Slava Bulach, Robert Bosch
Application of Workflow Petri Nets to Modeling of Formal Verification Processes in Design Flow of Digital Integrated Circuits
DATE, 2008.

DATE 2008
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@inproceedings{DATE-2008-WeinbergerBB,
	author        = "Katharina Weinberger and Slava Bulach and Robert Bosch",
	booktitle     = "{Proceedings of the 12th Conference on Design, Automation and Test in Europe}",
	doi           = "10.1109/DATE.2008.4484798",
	isbn          = "978-3-9810801-3-1",
	pages         = "937--938",
	publisher     = "{IEEE}",
	title         = "{Application of Workflow Petri Nets to Modeling of Formal Verification Processes in Design Flow of Digital Integrated Circuits}",
	year          = 2008,
}

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