Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems
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Alessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo
Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems
DATE, 2014.

DATE 2014
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@inproceedings{DATE-2014-CilardoFGM,
	author        = "Alessandro Cilardo and Edoardo Fusella and Luca Gallo and Antonino Mazzeo",
	booktitle     = "{Proceedings of the 18th Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.7873/DATE.2014.352",
	pages         = "1--4",
	publisher     = "{IEEE}",
	title         = "{Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems}",
	year          = 2014,
}

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