Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip
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Pai-Yu Chen, Deepak Kadetotad, Zihan Xu, Abinash Mohanty, Binbin Lin, Jieping Ye, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao, Shimeng Yu
Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip
DATE, 2015.

DATE 2015
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@inproceedings{DATE-2015-ChenKXMLYVSCY,
	acmid         = "2755947",
	author        = "Pai-Yu Chen and Deepak Kadetotad and Zihan Xu and Abinash Mohanty and Binbin Lin and Jieping Ye and Sarma B. K. Vrudhula and Jae-sun Seo and Yu Cao and Shimeng Yu",
	booktitle     = "{Proceedings of the 19th Conference and Exhibition on Design, Automation and Test in Europe}",
	isbn          = "978-3-9815370-4-8",
	pages         = "854--859",
	publisher     = "{ACM}",
	title         = "{Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip}",
	year          = 2015,
}

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