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Travelled to:
1 × France
Collaborated with:
K.Roy A.Sharma R.Venkatesan A.Raghunathan
Talks about:
fet (2) underlap (1) asymmetr (1) tunnel (1) system (1) robust (1) finfet (1) design (1) devic (1) sram (1)

Person: A. Arun Goud

DBLP DBLP: Goud:A=_Arun

Contributed to:

DATE 20152015

Wrote 2 papers:

DATE-2015-GoudVRR #design #robust #symmetry
Asymmetric underlapped FinFET based robust SRAM design at 7nm node (AAG, RV, AR, KR), pp. 659–664.
DATE-2015-SharmaGR
Sub-10 nm FinFETs and Tunnel-FETs: from devices to systems (AS, AAG, KR), pp. 1443–1448.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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