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Collaborated with:
J.Chhugani A.D.Nguyen V.W.Lee W.Macy M.Hagog Y.Chen S.Kumar P.Dubey
Talks about:
architectur (1) implement (1) effici (1) multi (1) sort (1) simd (1) core (1) cpu (1)

Person: Akram Baransi

DBLP DBLP: Baransi:Akram

Contributed to:

VLDB 20082008

Wrote 1 papers:

VLDB-2008-ChhuganiNLMHCBKD #architecture #cpu #implementation #manycore #performance #sorting
Efficient implementation of sorting on multi-core SIMD CPU architecture (JC, ADN, VWL, WM, MH, YKC, AB, SK, PD), pp. 1313–1324.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.