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Travelled to:
1 × Norway
1 × USA
Collaborated with:
A.D.Nguyen P.Dubey G.Wu E.Y.Chang C.J.Hughes A.Ghoting G.Buehrer S.Parthasarathy D.Kim J.Chhugani V.W.Lee W.Macy M.Hagog A.Baransi S.Kumar
Talks about:
architectur (1) processor (1) increment (1) implement (1) conscious (1) frequent (1) approxim (1) support (1) pattern (1) vector (1)

Person: Yen-Kuang Chen

DBLP DBLP: Chen:Yen=Kuang

Contributed to:

VLDB 20082008
KDD 20062006
VLDB 20052005

Wrote 3 papers:

VLDB-2008-ChhuganiNLMHCBKD #architecture #cpu #implementation #manycore #performance #sorting
Efficient implementation of sorting on multi-core SIMD CPU architecture (JC, ADN, VWL, WM, MH, YKC, AB, SK, PD), pp. 1313–1324.
KDD-2006-WuCCH #approximate #incremental #matrix
Incremental approximate matrix factorization for speeding up support vector machines (GW, EYC, YKC, CJH), pp. 760–766.
VLDB-2005-GhotingBPKNCD #mining
Cache-conscious Frequent Pattern Mining on a Modern Processor (AG, GB, SP, DK, ADN, YKC, PD), pp. 577–588.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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