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Travelled to:
1 × Germany
Collaborated with:
M.Bekooij L.J.M.Engels N.G.Busá J.Dielissen J.L.v.Meerbergen F.Harmsze S.Sawitzki J.Huisken
Talks about:
processor (2) function (1) behavior (1) output (1) effici (1) condit (1) turbo (1) power (1) layer (1) input (1)

Person: Albert van der Werf

DBLP DBLP: Werf:Albert_van_der

Contributed to:

DATE 20012001

Wrote 2 papers:

DATE-2001-BekooijEWB #behaviour #functional
Functional units with conditional input/output behavior in VLIW processors (MB, LJME, AvdW, NGB), p. 822.
DATE-2001-DielissenMBHSHW #power management
Power-efficient layered turbo decoder processor (JD, JLvM, MB, FH, SS, JH, AvdW), pp. 246–251.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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