25 papers:
- DAC-2015-ChenMRC #execution #paradigm #performance
- Opportunistic turbo execution in NTC: exploiting the paradigm shift in performance bottlenecks (HC, DM, SR, KC), p. 6.
- HPCA-2015-NairCRQ #latency #memory management
- Reducing read latency of phase change memory via early read and Turbo Read (PJN, CCC, BR, MKQ), pp. 309–319.
- HPCA-2014-LoK #manycore
- Dynamic management of TurboMode in modern multi-core chips (DL, CK), pp. 603–613.
- DATE-2013-MurugappaBJ #multi #standard
- Parameterized area-efficient multi-standard turbo decoder (PM, AB, MJ), pp. 109–114.
- KDD-2013-HanLPL0KY #graph #named #parallel #performance
- TurboGraph: a fast parallel graph engine handling billion-scale graphs in a single PC (WSH, SL, KP, JHL, MSK, JK, HY), pp. 77–85.
- DATE-2012-CondoMM #architecture
- A Network-on-Chip-based turbo/LDPC decoder architecture (CC, MM, GM), pp. 1525–1530.
- TOOLS-EUROPE-2012-ZhengAMSBVTQM #bytecode #partial evaluation
- Turbo DiSL: Partial Evaluation for High-Level Bytecode Instrumentation (YZ, DA, LM, AS, WB, AV, PT, ZQ, MM), pp. 353–368.
- CASE-2011-ParkCH #design #hybrid
- Design and control for hybrid magnetic thrust bearing for turbo refrigerant compressor (CHP, SKC, SYH), pp. 792–797.
- DATE-2011-MurugappaABJ #architecture #flexibility #multi #throughput
- A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding (PM, RAK, AB, MJ), pp. 228–233.
- DATE-2011-ReddyCBJ #complexity #power management
- A low complexity stopping criterion for reducing power consumption in turbo decoders (PR, FC, AB, MJ), pp. 649–654.
- DATE-2010-MayIWR
- A 150Mbit/s 3GPP LTE Turbo code decoder (MM, TI, NW, WR), pp. 1420–1425.
- DATE-2009-JafriKBJ #flexibility #linear
- ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications (ARJ, DK, AB, MJ), pp. 1620–1625.
- VLDB-2009-DobraJRX #convergence
- Turbo-Charging Estimate Convergence in DBO (AD, CJ, FR, FX), pp. 419–430.
- SAC-2009-LeeJKKKC #effectiveness #process
- Shader space navigator: a turbo for an intuitive and effective shading process (JHL, MHJ, DYK, SWK, MHK, JSC), pp. 945–946.
- DATE-2008-VogtW #configuration management #set
- A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment (TV, NW), pp. 38–43.
- DATE-2007-MoussaMBJ #communication #multi #network
- Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding (HM, OM, AB, MJ), pp. 654–659.
- DATE-2006-MullerBJ #design #multi
- ASIP-based multiprocessor SoC design for simple and double binary turbo decoding (OM, AB, MJ), pp. 1330–1335.
- DATE-v2-2004-RosaPGL #configuration management #framework #implementation
- Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform (ALR, CP, FG, LL), pp. 1218–1223.
- DATE-2003-GilbertTW #architecture #communication #embedded #multi
- Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors (FG, MJT, NW), pp. 10356–10363.
- DATE-2001-DielissenMBHSHW #power management
- Power-efficient layered turbo decoder processor (JD, JLvM, MB, FH, SS, JH, AvdW), pp. 246–251.
- DATE-2000-ViglioneMPRZ
- A 50 Mbit/s Iterative Turbo-Decoder (FV, GM, GP, MRR, MZ), pp. 176–180.
- SIGMOD-2000-ShenoyHSBBS #database #mining #scalability
- Turbo-charging Vertical Mining of Large Databases (PS, JRH, SS, GB, MB, DS), pp. 22–33.
- LCTES-1998-WeissFDFHJJRSS #compilation #java
- TurboJ, a Java Bytecode-to-Native Compiler (MW, FdF, BD, CF, FH, EAJ, VJ, FR, FS, XS), pp. 119–130.
- ITiCSE-1996-Velazquez-Iturbide #functional #named #programming
- HIPE: a Turbo-like environment for functional programming (JÁVI), p. 234.
- ILPS-1993-Hausman #erlang
- Turbo Erlang (BH), p. 662.