Travelled to:1 × Germany
Collaborated with:K.J.Kulikowski V.Venkataraman Z.Wang A.Kondratyev V.Varshavsky M.Kishinevsky E.E.Pissaloux
Talks about:behaviour (1) parallel (1) mismatch (1) insensit (1) diagram (1) circuit (1) capacit (1) system (1) balanc (1) speed (1)
Person: Alexander Taubin
DBLP: Taubin:Alexander
Contributed to:
2008
1994Wrote 2 papers:
- DATE-2008-KulikowskiVWT
- Power Balanced Gates Insensitive to Routing Capacitance Mismatch (KJK, VV, ZW, AT), pp. 1280–1285.
- PDP-1994-KondratyevTVKP #behaviour #diagrams #parallel
- Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems (AK, AT, VV, MK, EEP), pp. 220–226.