BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Germany
Collaborated with:
K.J.Kulikowski V.Venkataraman Z.Wang A.Kondratyev V.Varshavsky M.Kishinevsky E.E.Pissaloux
Talks about:
behaviour (1) parallel (1) mismatch (1) insensit (1) diagram (1) circuit (1) capacit (1) system (1) balanc (1) speed (1)

Person: Alexander Taubin

DBLP DBLP: Taubin:Alexander

Contributed to:

DATE 20082008
PDP 19941994

Wrote 2 papers:

Power Balanced Gates Insensitive to Routing Capacitance Mismatch (KJK, VV, ZW, AT), pp. 1280–1285.
PDP-1994-KondratyevTVKP #behaviour #diagrams #parallel
Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems (AK, AT, VV, MK, EEP), pp. 220–226.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.