72 papers:
DATE-2015-BaldwinBRPB #analysis #array #predict #using- Gait analysis for fall prediction using hierarchical textile-based capacitive sensor arrays (RB, SB, RR, CP, NB), pp. 1293–1298.
CHI-2015-HolzBK #identification #mobile #named #using- Bodyprint: Biometric User Identification on Mobile Devices Using the Capacitive Touchscreen to Scan Body Parts (CH, SB, MK), pp. 3011–3014.
CHI-2015-TungCYWC #automation #interactive #named- FlickBoard: Enabling Trackpad Interaction with Automatic Mode Switching on a Capacitive-sensing Keyboard (YCT, TYC, NHY, CW, MYC), pp. 1847–1850.
STOC-2014-KrishnaswamyNPS #approximate #clustering #design #energy #network #performance- Cluster before you hallucinate: approximating node-capacitated network design and energy efficient routing (RK, VN, KP, CS), pp. 734–743.
DATE-2013-DengKNOYOBKPD- Electrical calibration of spring-mass MEMS capacitive accelerometers (LD, VK, NSJN, MKO, EY, SO, BB, SK, DP, TD), pp. 571–574.
DATE-2013-WangXZWYWNW #using- Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories (XW, JX, WZ, XW, YY, ZW, MN, ZW), pp. 1221–1224.
DATE-2013-ZhaiYZ #algorithm #float #random- GPU-friendly floating random walk algorithm for capacitance extraction of VLSI interconnects (KZ, WY, HZ), pp. 1661–1666.
STOC-2013-LeeMM #theorem- A node-capacitated okamura-seymour theorem (JRL, MM, MM), pp. 495–504.
CHI-2013-Grosse-PuppendahlBKK #interface #proximity #recognition #ubiquitous- Swiss-cheese extended: an object recognition method for ubiquitous interfaces based on capacitive proximity sensing (TAGP, AB, FK, AK), pp. 1401–1410.
SAC-2013-ToledoAOD #algorithm #hybrid #multi #problem #search-based- A hybrid compact genetic algorithm applied to the multi-level capacitated lot sizing problem (CFMT, MdSA, RRRdO, ACBD), pp. 200–205.
DAC-2012-JoubertDBTH #3d #exclamation #problem- Capacitance of TSVs in 3-D stacked chips a problem?: not for neuromorphic systems! (AJ, MD, BB, OT, RH), pp. 1264–1265.
CHI-2012-ChanMRB- CapStones and ZebraWidgets: sensing stacks of building blocks, dials and sliders on capacitive touch screens (LC, SM, AR, PB), pp. 2189–2192.
KDD-2012-MajumderDN #network #problem #social- Capacitated team formation problem on social networks (AM, SD, KVMN), pp. 1005–1013.
CASE-2011-WuS #bound #multi #problem- A lower and upper bound guided nested partitions method for solving capacitated multi-level production planning problems (TW, LS), pp. 78–83.
DAC-2011-HsiaoD #bound #parallel #scalability- A highly scalable parallel boundary element method for capacitance extraction (YCH, LD), pp. 552–557.
DAC-2011-ZhaoF #3d #gpu #parallel #performance- Fast multipole method on GPU: tackling 3-D capacitance extraction on massively parallel SIMD platforms (XZ, ZF), pp. 558–563.
DATE-2011-LuHCT #bound- Steiner tree based rotary clock routing with bounded skew and capacitive load balancing (JL, VH, XC, BT), pp. 455–460.
ICALP-v1-2011-AdamaszekCLW #approximate #design #geometry #network- Approximation Schemes for Capacitated Geometric Network Design (AA, AC, AL, JOW), pp. 25–36.
CHI-2011-RogersWSM #3d #estimation #named #precise #robust- AnglePose: robust, precise capacitive touch tracking via 3d orientation estimation (SR, JW, CDS, RMS), pp. 2575–2584.
CHI-2011-YuCLTHTHCCHH #interactive #multi #named- TUIC: enabling tangible interaction on capacitive multi-touch displays (NHY, LWC, SYL, SST, ICH, DJT, FIH, LPC, MYC, PH, YPH), pp. 2995–3004.
HIMI-v2-2011-XuB #interactive #mobile #navigation #usability- Usability Issues in Introducing Capacitive Interaction into Mobile Navigation (SX, KB), pp. 430–439.
CASE-2009-WuS #heuristic #multi #problem- A new heuristic method for capacitated multi-level lot sizing problem with backlogging (TW, LS), pp. 483–488.
DAC-2009-ChaiJK #3d #complexity #equation #linear #scalability- A direct integral-equation solver of linear complexity for large-scale 3D capacitance and impedance extraction (WC, DJ, CKK), pp. 752–757.
DAC-2009-GongYH #incremental #named #parallel #probability #process- PiCAP: a parallel and incremental capacitance extraction considering stochastic process variation (FG, HY, LH), pp. 764–769.
DAC-2009-YuHZ- Variational capacitance extraction of on-chip interconnects based on continuous surface model (WY, CH, WZ), pp. 758–763.
DATE-2009-WangCTHR #modelling #optimisation #performance #polynomial #using- An efficient decoupling capacitance optimization using piecewise polynomial models (XW, YC, SXDT, XH, JR), pp. 1190–1195.
HCI-NIMT-2009-BittnerS #low cost #named- VersaPatch: A Low Cost 2.5D Capacitive Touch Sensor (RB, MS), pp. 407–416.
DAC-2008-El-MoselhyEW #algorithm #parametricity #performance #scalability #set- Efficient algorithm for the computation of on-chip capacitance sensitivities with respect to a large set of parameters (TAEM, IME, DW), pp. 906–911.
DATE-2008-BingesserLHHMDV #metric- Low-Noise Sigma-Delta Capacitance-to-Digital Converter for Sub-pF Capacitive Sensors with Integrated Dielectric Loss Measurement (MB, TL, WH, JH, SM, RD, MV), pp. 868–872.
DATE-2008-KulikowskiVWT- Power Balanced Gates Insensitive to Routing Capacitance Mismatch (KJK, VV, ZW, AT), pp. 1280–1285.
DATE-2008-ZhangYWYJX #correlation #performance #process #statistics- An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation (WZ, WY, ZW, ZY, RJ, JX), pp. 580–585.
DAC-2007-RoyMC #nondeterminism- Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew (AR, NHM, MHC), pp. 184–187.
DAC-2007-ZhaoPRFMCSY- On-Chip Decoupling Capacitance and P/G Wire Co-optimization for Dynamic Noise (MZ, RP, BR, YF, TM, SC, SS, SY), pp. 162–167.
DAC-2007-ZhouLS #bound #embedded #hybrid #multi #performance #using- Fast Capacitance Extraction in Multilayer, Conformal and Embedded Dielectric using Hybrid Boundary Element Method (NYZ, ZL, WS), pp. 835–840.
DATE-2007-ZhuZCXZ #grid #probability #process- A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology (HZ, XZ, WC, JX, DZ), pp. 1514–1519.
STOC-2007-Pap- Some new results on node-capacitated packing of A-paths (GP), pp. 599–604.
DAC-2006-ZhaoPSYF #algorithm #linear #megamodelling #performance #programming #using- A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming (MZ, RP, SS, SY, YF), pp. 217–222.
DAC-2005-JiangCC #3d #algorithm #linear #named #order- ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction (RJ, YHC, CCPC), pp. 163–166.
DAC-2005-SuWKLK #analysis #effectiveness #embedded #functional #performance- A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis (HS, DW, CVK, FL, BK), pp. 186–189.
DATE-2005-BhaduriV #higher-order #induction #metric- Inductive and Capacitive Coupling Aware Routing Methodology Driven by a Higher Order RLCK Moment Metric (AB, RV), pp. 922–923.
DAC-2004-AgarwalSYV #modelling #performance- Fast and accurate parasitic capacitance models for layout-aware (AA, HS, VY, RV), pp. 145–150.
DAC-2004-YanSS #3d #multi- Sparse transformations and preconditioners for hierarchical 3-D capacitance extraction with multiple dielectrics (SY, VS, WS), pp. 788–793.
DATE-v1-2004-GarciaMSN #scalability- A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit (JCG, JAMN, JS, HN), pp. 680–681.
DATE-v1-2004-WongT #configuration management #encoding #power management- Re-Configurable Bus Encoding Scheme for Reducing Power Consumption of the Cross Coupling Capacitance for Deep Sub-Micron Instruction Bus (SKW, CYT), pp. 130–135.
DATE-v2-2004-AgarwalSYV #estimation- Accurate Estimation of Parasitic Capacitances in Analog Circuits (AA, HS, VY, RV), pp. 1364–1365.
ICALP-2004-JothiR #algorithm #approximate #design #network #problem- Approximation Algorithms for the Capacitated Minimum Spanning Tree Problem and Its Variants in Network Design (RJ, BR), pp. 805–818.
ICPR-v2-2004-BevilacquaG #analysis #image- Age-related Skin Analysis by Capacitance Images (AB, AG), pp. 703–706.
DAC-2003-AgarwalSB #effectiveness- An effective capacitance based driver output model for on-chip RLC interconnects (KA, DS, DB), pp. 376–381.
DAC-2002-Sheehan #predict- Osculating Thevenin model for predicting delay and slew of capacitively characterized cells (BNS), pp. 866–869.
DAC-2002-VenkatesanDM #distributed #physics- A physical model for the transient response of capacitively loaded distributed rlc interconnects (RV, JAD, JDM), pp. 763–766.
DAC-2002-VrudhulaBS #estimation- Estimation of the likelihood of capacitive coupling noise (SBKV, DB, SS), pp. 653–658.
DAC-2000-KapurL #scalability- Large-scale capacitance calculation (SK, DEL), pp. 744–749.
DAC-2000-Zhao #3d- Singularity-treated quadrature-evaluated method of moments solver for 3-D capacitance extraction (JZ), pp. 536–539.
DAC-1999-JandhyalaSBC #adaptation #performance- Efficient Capacitance Computation for Structures with Non-Uniform Adaptive Surface Meshes (VJ, SS, JEB, ZJC), pp. 543–548.
DAC-1999-TauschW #multi #performance- A Multiscale Method for Fast Capacitance Extraction (JT, JKW), pp. 537–542.
DATE-1999-ToulouseBLN #3d #modelling #performance- Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts (AT, DB, CL, PN), pp. 576–580.
DAC-1998-DengiR #2d #bound #megamodelling- Boundary Element Method Macromodels for 2-D Hierachical Capacitance Extraction (EAD, RAR), pp. 218–223.
DAC-1998-ShiLKY #3d #algorithm #performance- A Fast Hierarchical Algorithm for 3-D Capacitance Extraction (WS, JL, NK, TY), pp. 212–217.
DATE-1998-OhP- Gated Clock Routing Minimizing the Switched Capacitance (JO, MP), pp. 692–697.
STOC-1998-CharikarKR #algorithm- Algorithms for Capacitated Vehicle Routing (MC, SK, BR), pp. 349–358.
DAC-1997-BeattieP #bound- Bounds for BEM Capacitance Extraction (MWB, LTP), pp. 133–136.
DAC-1997-ChenW- Optimal Wire-Sizing Function with Fringing Capacitance Consideration (CPC, DFW), pp. 604–607.
DAC-1997-CongHKNSY #2d #analysis- Analysis and Justification of a Simple, Practical 2 1/2-D Capacitance Extraction Methodology (JC, LH, ABK, DN, NS, SHCY), pp. 627–632.
DAC-1997-DartuP #worst-case- Calculating Worst-Case Gate Delays Due to Dominant Capacitance Coupling (FD, LTP), pp. 46–51.
DAC-1997-DengiR #2d #modelling- Hierarchical 2-D Field Solution for Capacitance Extraction for VLSI Interconnect Modeling (EAD, RAR), pp. 127–132.
EDTC-1997-GeigenmullerM #3d #integration #multi- Cartesian multipole based numerical integration for 3D capacitance extraction (UG, NPvdM), pp. 256–259.
DAC-1996-AluruNW #analysis #parallel- A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis (NRA, VBN, JW), pp. 363–366.
DAC-1996-KrauterXDP #image- A Sparse Image Method for BEM Capacitance Extraction (BK, YX, EAD, LTP), pp. 357–362.
DAC-1996-TauschW #multi- Multipole Accelerated Capacitance Calculation for Structures with Multiple Dielectrics with high Permittivity Ratios (JT, JKW), pp. 367–370.
DAC-1992-NaborsW #3d #algorithm #multi- Multipole-Accelerated 3-D Capacitance Extraction Algorithms for Structures with Conformal Dielectrics (KN, JW), pp. 710–715.
DAC-1989-MeijsG #finite #performance- An Efficient Finite Element Method for Submicron IC Capacitance Extraction (NPvdM, AJvG), pp. 678–681.
DAC-1983-TarolliH- Hierarchical circuit extraction with detailed parasitic capacitance (GMT, WJH), pp. 337–345.