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Travelled to:
1 × France
1 × Germany
Collaborated with:
Y.Chen D.Chen M.Gholipour A.Rogachev G.Iannaccone G.Fiori
Talks about:
compat (2) spice (2) model (2) transistor (1) technolog (1) process (1) graphen (1) circuit (1) analysi (1) variat (1)

Person: Amit Sangai

DBLP DBLP: Sangai:Amit

Contributed to:

DATE 20142014
DATE 20132013

Wrote 2 papers:

DATE-2014-GholipourCSC #modelling #scalability
Highly accurate SPICE-compatible modeling for single- and double-gate GNRFETs with studies on technology scaling (MG, YYC, AS, DC), pp. 1–6.
DATE-2013-ChenRSIFC #analysis #process
A SPICE-compatible model of graphene nano-ribbon field-effect transistors enabling circuit-level delay and power analysis under process variation (YYC, AR, AS, GI, GF, DC), pp. 1789–1794.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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