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Travelled to:
1 × USA
Collaborated with:
R.Lee
Talks about:
microprocessor (1) silicon (1) system (1) verif (1) handl (1) error (1) alpha (1) pre (1)

Person: Benjamin Tsien

DBLP DBLP: Tsien:Benjamin

Contributed to:

DAC 20012001

Wrote 1 papers:

DAC-2001-LeeT #fault #verification
Pre-silicon Verification of the Alpha 21364 Microprocessor Error Handling System (RL, BT), pp. 822–827.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.