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Travelled to:
1 × France
1 × Germany
2 × USA
Collaborated with:
W.Fornaciari F.Salice D.Sciuto
Talks about:
level (3) function (2) analysi (2) energi (2) sourc (2) model (2) estim (2) base (2) microprocessor (1) methodolog (1)

Person: Carlo Brandolese

DBLP DBLP: Brandolese:Carlo

Contributed to:

DAC 20042004
DATE DF 20042004
DATE 20032003
DAC 20002000

Wrote 4 papers:

DAC-2004-BrandoleseFS #design #estimation
An area estimation methodology for FPGA based designs at systemc-level (CB, WF, FS), pp. 129–132.
DATE-DF-2004-BrandoleseFSS #analysis #energy #modelling #program transformation #source code
Analysis and Modeling of Energy Reducing Source Code Transformations (CB, WF, FS, DS), pp. 306–311.
DATE-2003-BrandoleseFSS #analysis #library
Library Functions Timing Characterization for Source-Level Analysis (CB, WF, FS, DS), pp. 11132–11133.
DAC-2000-BrandoleseFSS #energy #estimation
An instruction-level functionally-based energy estimation model for 32-bits microprocessors (CB, WF, FS, DS), pp. 346–351.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.