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Travelled to:
1 × France
Collaborated with:
F.Yu B.Zeng Y.Huang H.Wu R.Tsay
Talks about:
determinist (1) synchron (1) instruct (1) approach (1) section (1) critic (1) simul (1) multi (1) level (1) time (1)

Person: Che-Rung Lee

DBLP DBLP: Lee:Che=Rung

Contributed to:

DATE 20132013

Wrote 1 papers:

DATE-2013-YuZHWLT #approach #manycore #set #simulation
A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations (FWY, BHZ, YHH, HIW, CRL, RST), pp. 643–648.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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