A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations
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Fan-Wei Yu, Bo-Han Zeng, Yu-Hung Huang, Hsin-I. Wu, Che-Rung Lee, Ren-Song Tsay
A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations
DATE, 2013.

DATE 2013
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@inproceedings{DATE-2013-YuZHWLT,
	acmid         = "2485446",
	author        = "Fan-Wei Yu and Bo-Han Zeng and Yu-Hung Huang and Hsin-I. Wu and Che-Rung Lee and Ren-Song Tsay",
	booktitle     = "{Proceedings of the 17th Conference on Design, Automation and Test in Europe}",
	isbn          = "978-1-4503-2153-2",
	pages         = "643--648",
	publisher     = "{EDA Consortium San Jose, CA, USA / ACM DL}",
	title         = "{A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations}",
	year          = 2013,
}

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