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Travelled to:
1 × USA
Collaborated with:
N.K.Jha
Talks about:
fin (2) fet (2) framework (1) process (1) variat (1) integr (1) under (1) power (1) model (1) delay (1)

Person: Chun-Yi Lee

DBLP DBLP: Lee:Chun=Yi

Contributed to:

DAC 20112011

Wrote 1 papers:

DAC-2011-LeeJ #framework #modelling #named #process
CACTI-FinFET: an integrated delay and power modeling framework for FinFET-based caches under process variations (CYL, NKJ), pp. 866–871.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.