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Travelled to:
1 × Germany
Collaborated with:
S.Perissakis F.Andritsopoulos C.Charopoulos G.Doumenis F.Karoubalis Y.Mitsos F.Petreas I.Theologitou G.Lykakis N.Mouratidis K.Vlachos N.A.Nikolaou G.Sourdis G.E.Konstantoulakis D.N.Pnevmatikatos
Talks about:
processor (1) protocol (1) process (1) complex (1) system (1) effici (1) verif (1) studi (1) innov (1) field (1)

Person: Dionisios I. Reisis

DBLP DBLP: Reisis:Dionisios_I=

Contributed to:

DATE 20032003

Wrote 2 papers:

DATE-2003-AndritsopoulosCDKMPTPR #case study #verification
Verification of a Complex SoC: The PRO3 Case-Study (FA, CC, GD, FK, YM, FP, IT, SP, DIR), pp. 20224–20231.
DATE-2003-LykakisMVNPSKPR #performance #protocol
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip (GL, NM, KV, NAN, SP, GS, GEK, DNP, DIR), pp. 20014–20019.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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