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Travelled to:
1 × Germany
Collaborated with:
C.Yeh K.Cheng J.Wang N.Chang
Talks about:
design (1) kbps (1) chip (1) rsa (1) bit (1)

Person: En-Feng Hsu

DBLP DBLP: Hsu:En=Feng

Contributed to:

DATE Designers’ Forum 20062006

Wrote 1 papers:

DATE-DF-2006-YehHCWC #design
An 830mW, 586kbps 1024-bit RSA chip design (CY, EFH, KWC, JSW, NJC), pp. 24–29.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.