Stem bit$ (all stems)

218 papers:

DAC-2015-SeyedzadehMJM #encoding #memory management #named #pseudo #reduction

PRES: pseudo-random encoding scheme to increase the bit flip reduction in the memory (SMS, RM, AKJ, RGM), p. 6.

DAC-2015-TziantzioulisGF #correlation #fault #float #integer #named

b-HiVE: a bit-level history-based error model with value correlation for voltage-scaled integer and floating point units (GT, AMG, SMF, NH, SOM, SP), p. 6.

DATE-2015-FangHYZLG #estimation #fault #performance

Efficient bit error rate estimation for high-speed link by Bayesian model fusion (CF, QH, FY, XZ, XL, CG), pp. 1024–1029.

DATE-2015-TaatizadehN #automation #design #detection #embedded #validation

A methodology for automated design of embedded bit-flips detectors in post-silicon validation (PT, NN), pp. 73–78.

DATE-2015-Weis0ESVGKW #fault #metric #modelling

Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs (CW, MJ, PE, CS, PV, SG, MK, NW), pp. 495–500.

SIGMOD-2015-Atre #query

Left Bit Right: For SPARQL Join Queries with OPTIONAL Patterns (Left-outer-joins) (MA), pp. 1793–1808.

ESOP-2015-DavidKL #source code #strict #termination

Unrestricted Termination and Non-termination Arguments for Bit-Vector Programs (CD, DK, ML), pp. 183–204.

ICALP-v1-2015-LiP #fibonacci

Replacing Mark Bits with Randomness in Fibonacci Heaps (JL, JP), pp. 886–897.

HIMI-IKC-2015-SotokawaMNSI #detection #evaluation

Driving Evaluation of Mild Unilateral Spatial Neglect Patients-Three High-Risk Cases Undetected by BIT After Recovery (TS, TM, JN, YS, MI), pp. 253–261.

ICML-2015-ZhuG #complexity #robust #towards

Towards a Lower Sample Complexity for Robust One-bit Compressed Sensing (RZ, QG), pp. 739–747.

KDD-2015-Li #consistency

0-Bit Consistent Weighted Sampling (PL), pp. 665–674.

SPLC-2015-McVoy #product line

Preliminary product line support in BitKeeper (LM), pp. 245–252.

ISMM-2015-Kuszmaul #named #parallel #performance #thread

SuperMalloc: a super fast multithreaded malloc for 64-bit machines (BCK), pp. 41–55.

DAC-2014-LiuCHWXY #3d #design

Design Methodologies for 3D Mixed Signal Integrated Circuits: a Practical 12-bit SAR ADC Design Case (WL, GC, XH, YW, YX, HY), p. 6.

DAC-2014-RaoEST #multi #using

Protecting SRAM-based FPGAs Against Multiple Bit Upsets Using Erasure Codes (PMBR, ME, RS, MBT), p. 6.

DATE-2014-GuoWWH #automation #effectiveness #named #test coverage

EATBit: Effective automated test for binary translation with high code coverage (HG, ZW, CW, RH), pp. 1–6.

DATE-2014-ImhofW #architecture #fault tolerance

Bit-Flipping Scan — A unified architecture for fault tolerance and offline test (MEI, HJW), pp. 1–6.

DATE-2014-LeeA #architecture #hybrid #novel #power management #using

A novel low power 11-bit hybrid ADC using flash and delay line architectures (HCL, JAA), pp. 1–4.

TACAS-2014-GurfinkelB #contest #named #verification

FrankenBit: Bit-Precise Verification with Many Bits — (Competition Contribution) (AG, AB), pp. 408–411.

TACAS-2014-GurfinkelBM #invariant

Synthesizing Safe Bit-Precise Invariants (AG, AB, JMS), pp. 93–108.

CSMR-WCRE-2014-Heing-BeckerKS #developer #injection

Bit-error injection for software developers (MHB, TK, SS), pp. 434–439.

SCAM-2014-YadegariD #analysis

Bit-Level Taint Analysis (BY, SD), pp. 255–264.

ICALP-v1-2014-FouqueT #generative #random

Close to Uniform Prime Number Generation with Fewer Random Bits (PAF, MT), pp. 991–1002.

CSCW-2014-CrabtreeC #challenge #design #enterprise

Making it “pay a bit better”: design challenges for micro rural enterprise (AC, AC), pp. 687–696.

VISSOFT-2014-Noble #programming language

Livecoding the SynthKit: Little Bits as an Embodied Programming Language (JN), pp. 40–44.

ICML-c2-2014-0005YJ #algorithm #performance #robust

Efficient Algorithms for Robust One-bit Compressive Sensing (LZ, JY, RJ), pp. 820–828.

ICPR-2014-FuKGYZ #ranking

Binary Code Reranking Method Based on Bit Importance (HF, XK, YG, XY, LZ), pp. 2679–2684.

ICPR-2014-MarroccoT #fault

Bit Error Recovery in ECOC Systems through LDPC Codes (CM, FT), pp. 1454–1459.

ICPR-2014-ZhuY #image #optimisation #quality

A Bit Allocation Optimization Method for ROI Based Image Compression with Stable Image Quality (YZ, JY), pp. 849–854.

CAV-2014-HadareanBJBT #lazy evaluation

A Tale of Two Solvers: Eager and Lazy Approaches to Bit-Vectors (LH, KB, DJ, CB, CT), pp. 680–695.

CAV-2014-Nadel #automation #generative

Bit-Vector Rewriting with Automatic Rule Generation (AN), pp. 663–679.

DATE-2013-LuL #multi

Slack budgeting and slack to length converting for multi-bit flip-flop merging (CCL, RBL), pp. 1837–1842.

DATE-2013-ParkQPC #embedded #logic #self

40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS (SP, MQ, LSP, APC), pp. 1637–1642.

SIGMOD-2013-LiP #in memory #memory management #named #performance

BitWeaving: fast scans for main memory data processing (YL, JMP), pp. 289–300.

VLDB-2013-YuanLWJZL #named #performance #rdf #scalability

TripleBit: a Fast and Compact System for Large Scale RDF Data (PY, PL, BW, HJ, WZ, LL), pp. 517–528.

TACAS-2013-JohnC #linear #quantifier

Extending Quantifier Elimination to Linear Inequalities on Bit-Vectors (AKJ, SC), pp. 78–92.

CHI-2013-LiangCCPCLYC13a #interactive #named

GaussBits: magnetic tangible bits for portable and occlusion-free near-surface interactions (RHL, KYC, LWC, CXP, MYC, RHL, DNY, BYC), pp. 1391–1400.

CSCW-2013-Waterhouse #metric

Pay by the bit: an information-theoretic metric for collective human judgment (TPW), pp. 623–638.

ICML-c3-2013-GopiN0N

One-Bit Compressed Sensing: Provable Support and Vector Recovery (SG, PN, PJ, AVN), pp. 154–162.

SAC-2013-ChenLWW #abstraction #source code #static analysis

Static analysis of list-manipulating programs via bit-vectors and numerical abstractions (LC, RL, XW, JW), pp. 1204–1210.

CADE-2013-KovasznaiFB #quantifier

: A Tool for Polynomially Translating Quantifier-Free Bit-Vector Formulas into (GK, AF, AB), pp. 443–449.

DAC-2012-JimenezNI

Software controlled cell bit-density to improve NAND flash lifetime (XJ, DN, PI), pp. 229–234.

DATE-2012-JafariJL #analysis #scheduling #worst-case

Worst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling (FJ, AJ, ZL), pp. 538–541.

TACAS-2012-BaslerDKKTW #c #contest #named #source code #verification

satabs: A Bit-Precise Verifier for C Programs — (Competition Contribution) (GB, AFD, AK, DK, MT, TW), pp. 552–555.

TACAS-2012-CoxSC #bound #precise #verification

A Bit Too Precise? Bounded Verification of Quantized Digital Filters (AC, SS, BYEC), pp. 33–47.

ICPR-2012-dAngeloAV #image

Beyond bits: Reconstructing images from Local Binary Descriptors (Ed, AA, PV), pp. 935–938.

RecSys-2012-KluverNESR #how #question #rating

How many bits per rating? (DK, TTN, MDE, SS, JR), pp. 99–106.

HPCA-2012-SuhAD #markov #multi #named #reliability

MACAU: A Markov model for reliability evaluations of caches under Single-bit and Multi-bit Upsets (JS, MA, MD), pp. 3–14.

IJCAR-2012-SpielmannK #bound #synthesis

Synthesis for Unbounded Bit-Vector Arithmetic (AS, VK), pp. 499–513.

SAT-2012-AbalCHP #problem #term rewriting #using

Using Term Rewriting to Solve Bit-Vector Arithmetic Problems — (Poster Presentation) (IA, AC, JH, JSP), pp. 493–495.

SMT-2012-KovasznaiFB #complexity #logic #on the

On the Complexity of Fixed-Size Bit-Vector Logics with Binary Encoded Bit-Width (GK, AF, AB), pp. 44–56.

DAC-2011-ChoiYLA #behaviour #fault #performance

Matching cache access behavior and bit error pattern for high performance low Vcc L1 cache (YGC, SY, SL, JHA), pp. 978–983.

DAC-2011-Li #memory management

Rethinking memory redundancy: optimal bit cell repair for maximum-information storage (XL0), pp. 316–321.

DATE-2011-GrammatikakisPSP #estimation #using

System-level power estimation methodology using cycle- and bit-accurate TLM (MDG, SP, JPS, CP), pp. 1125–1126.

DATE-2011-SinghSG #generative #performance #testing #using

Testing of high-speed DACs using PRBS generation with “Alternate-Bit-Tapping” (MS, MS, SG), pp. 377–382.

SIGMOD-2011-SchaikM #data type #memory management #performance #reachability

A memory efficient reachability data structure through bit vector compression (SJvS, OdM), pp. 913–924.

LATA-2011-NielsenH #parsing #regular expression

Bit-coded Regular Expression Parsing (LN, FH), pp. 402–413.

CHI-2011-SundstromTGWBL #comprehension #towards

Inspirational bits: towards a shared understanding of the digital material (PS, AST, KG, NW, JSB, ML), pp. 1561–1570.

SAC-2011-LiuWYL #modelling #protocol #scalability

Scalable CP-nets modeling for BitTorrent protocol (JL, HW, XY, JL), pp. 542–543.

DAC-2010-GolubitskyFM #synthesis

Synthesis of the optimal 4-bit reversible circuits (OG, SMF, DM), pp. 653–656.

DAC-2010-XieNXZLWYWL #analysis #fault

Crosstalk noise and bit error rate analysis for optical network-on-chip (YX, MN, JX, WZ, QL, XW, YY, XW, WL), pp. 657–660.

DATE-2010-AkinSH #configuration management #estimation #hardware #multi

A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation (AA, GS, IH), pp. 393–398.

DATE-2010-FroehlichSB

A 14 bit, 280 kS/s cyclic ADC with 100 dB SFDR (TF, VS, MB), pp. 706–710.

DATE-2010-IzumiISO #multi

Improved countermeasure against Address-bit DPA for ECC scalar multiplication (MI, JI, KS, KO), pp. 981–984.

DATE-2010-KimKL #named #reliability #similarity

SimTag: Exploiting tag bits similarity to improve the reliability of the data caches (JK, SK, YL), pp. 941–944.

DATE-2010-SheaSC #identifier #performance

Scoped identifiers for efficient bit aligned logging (RS, MBS, YC), pp. 1450–1455.

DATE-2010-VenutoSCP #power management

Ultra low-power 12-bit SAR ADC for RFID applications (DDV, ES, DTC, YP), pp. 1071–1075.

TACAS-2010-BardinHP #satisfiability

An Alternative to SAT-Based Approaches for Bit-Vectors (SB, PH, FP), pp. 84–98.

TACAS-2010-CookKRW #ranking #synthesis

Ranking Function Synthesis for Bit-Vector Relations (BC, DK, PR, CMW), pp. 236–250.

ICFP-2010-VytiniotisK #functional

Functional pearl: every bit counts (DV, AJK), pp. 15–26.

ICPR-2010-DursunG #2d #fourier

Reversible Interger 2-D Discrete Fourier Transform by Control Bits (SD, AMG), pp. 4436–4439.

CGO-2010-KochBF #code generation

Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bit instructions (TJKEvK, IB, BF), pp. 180–189.

HPDC-2010-GuanYCGLC #distributed #named

DistriBit: a distributed dynamic binary translator system for thin client computing (HG, YY, KC, YG, LL, YC), pp. 684–691.

HPDC-2010-WojciechowskiCPI #named #network #towards

BTWorld: towards observing the global BitTorrent file-sharing network (MW, MC, JAP, AI), pp. 581–588.

ISMM-2010-ZhaoBA #architecture #memory management #performance

Efficient memory shadowing for 64-bit architectures (QZ, DB, SPA), pp. 93–102.

IJCAR-2010-MaricJ #named #reduction

URBiVA: Uniform Reduction to Bit-Vector Arithmetic (FM, PJ), pp. 346–352.

DATE-2009-Diaz-MadridNHDR #pipes and filters #reduction

Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing (JÁDM, HN, HH, GDA, RRM), pp. 369–373.

DATE-2009-HeH #algorithm #encoding #performance #verification

An efficient path-oriented bitvector encoding width computation algorithm for bit-precise verification (NH, MSH), pp. 1602–1607.

DATE-2009-KinsmanN #finite #modulo theories #precise #using

Finite Precision bit-width allocation using SAT-Modulo Theory (ABK, NN), pp. 1106–1111.

TACAS-2009-BrummayerB #array #named #performance #smt

Boolector: An Efficient SMT Solver for Bit-Vectors and Arrays (RB, AB), pp. 174–177.

STOC-2009-Viola #bound #data type

Bit-probe lower bounds for succinct data structures (EV), pp. 475–482.

CIAA-J-2008-DixonES09 #analysis

Analysis of Bit-Split Languages for Packet Scanning and Experiments with Wildcard Matching (RD, ÖE, TS), pp. 597–612.

LATA-2009-FredrikssonG #string

Nested Counters in Bit-Parallel String Matching (KF, SG), pp. 338–349.

ICEIS-DISI-2009-SantosB #optimisation #performance #query

A Bit-selector Technique for Performance Optimization of Decision-support Queries (RJS, JB), pp. 151–157.

ICML-2009-RaykarYZJFVBM #learning #multi #trust

Supervised learning from multiple experts: whom to trust when everyone lies a bit (VCR, SY, LHZ, AKJ, CF, GHV, LB, LM), pp. 889–896.

SEKE-2009-TosunBK #development #issue tracking #named #project management

BITS: Issue Tracking and Project Management Tool in Healthcare Software Development (AT, ABB, EK), pp. 526–529.

SAC-2009-HeYAL #named #network

BPR: a bit-level packet recovery in wireless sensor networks (JH, JY, CA, XL), pp. 59–65.

ASPLOS-2009-CameronL #architecture #induction #parallel #principle

Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principle (RDC, DL), pp. 337–348.

CAV-2009-JhaLS #named #performance #smt

Beaver: Engineering an Efficient SMT Solver for Bit-Vector Arithmetic (SJ, RL, SAS), pp. 668–674.

DAC-2008-ChongP #agile #float #generative

Rapid application specific floating-point unit generation with bit-alignment (YJC, SP), pp. 62–67.

DATE-2008-ChoiC #testing #using

Digital bit stream jitter testing using jitter expansion (HWC, AC), pp. 1468–1473.

DATE-2008-KoenigSB #algorithm #novel #recursion

A Novel Recursive Algorithm for Bit-Efficient Realization of Arbitrary Length Inverse Modified Cosine Transforms (RK, TS, JB), pp. 604–609.

DATE-2008-MayerH #architecture #optimisation #performance

System Performance Optimization Methodology for Infineon’s 32-Bit Automotive Microcontroller Architecture (AM, FH), pp. 962–966.

CIAA-2008-DixonES #analysis

Automata-Theoretic Analysis of Bit-Split Languages for Packet Scanning (RD, ÖE, TS), pp. 141–150.

ICEIS-SAIC-2008-KangasharjuK #data transfer #mobile #using #xml

Using Bit-Efficient XML to Optimize Data Transfer of XForms-Based Mobile Services (JK, OK), pp. 5–11.

ICPR-2008-OhyamaNYN

Reversible data hiding of full color JPEG2000 compressed bit-stream preserving bit-depth information (SO, MN, KY, HN), pp. 1–4.

SAC-2008-YuB #detection #effectiveness #multi #performance

A fast and effective method to detect multiple least significant bits steganography (XY, NB), pp. 1443–1447.

CC-2008-NitaG #automation #c #multi

Automatic Transformation of Bit-Level C Code to Support Multiple Equivalent Data Layouts (MN, DG), pp. 85–99.

ISMM-2008-SartorHM

No bit left behind: the limits of heap data compression (JBS, MH, KSM), pp. 111–120.

PPoPP-2008-Cameron #case study #parallel

A case study in SIMD text processing with parallel bit streams: UTF-8 to UTF-16 transcoding (RDC), pp. 91–98.

ICDAR-2007-ChellapillaP #retrieval #robust

Redundant Bit Vectors for Robust Indexing and Retrieval of Electronic Ink (KC, JCP), pp. 387–391.

SIGMOD-2007-HollowayRSD #database #how

How to barter bits for chronons: compression and bandwidth trade offs for database scans (ALH, VR, GS, DJD), pp. 389–400.

TACAS-2007-BryantKOSSB #abstraction

Deciding Bit-Vector Arithmetic with Abstraction (REB, DK, JO, SAS, OS, BAB), pp. 358–372.

ECOOP-2007-VenstermansEB #java #pointer #virtual machine

Object-Relative Addressing: Compressed Pointers in 64-Bit Java Virtual Machines (KV, LE, KDB), pp. 79–100.

PADL-2007-GustafssonS #erlang #evaluation #implementation #performance #programming

Applications, Implementation and Performance Evaluation of Bit Stream Programming in Erlang (PG, KFS), pp. 94–108.

CAV-2007-GaneshD #array

A Decision Procedure for Bit-Vectors and Arrays (VG, DLD), pp. 519–531.

CAV-2007-ManoliosSV #analysis #named

BAT: The Bit-Level Analysis Tool (PM, SKS, DV), pp. 303–306.

SAT-2007-HeuleM #multi

From Idempotent Generalized Boolean Assignments to Multi-bit Search (MH, HvM), pp. 134–147.

DATE-2006-MallikSBZ #design #optimisation #power management

Smart bit-width allocation for low power optimization in a systemc based ASIC design environment (AM, DS, PB, HZ), pp. 618–623.

DATE-2006-ParkCR #adaptation #energy #image #quality #trade-off

Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off (JP, JHC, KR), pp. 520–521.

DATE-2006-SundaresanM #energy #optimisation

Value-based bit ordering for energy optimization of on-chip global signal buses (KS, NRM), pp. 624–625.

DATE-2006-ThornbergO #memory management #realtime #specification #video

Impact of bit-width specification on the memory hierarchy for a real-time video processing system (BT, MO), pp. 752–753.

DATE-DF-2006-YehHCWC #design

An 830mW, 586kbps 1024-bit RSA chip design (CY, EFH, KWC, JSW, NJC), pp. 24–29.

ESOP-2006-CodishLSS #analysis #termination

Size-Change Termination Analysis in k-Bits (MC, VL, PS, PJS), pp. 230–245.

TACAS-2006-KroeningS #approximate #image #logic

Approximating Predicate Images for Bit-Vector Logic (DK, NS), pp. 242–256.

CSMR-2006-KaczorGH #algorithm #design pattern #identification #performance

Efficient Identification of Design Patterns with Bit-vector Algorithm (OK, YGG, SH), pp. 175–184.

WCRE-2006-Muller #challenge

Bits of History, Challenges for the Future and Autonomic Computing Technology (HAM), pp. 9–18.

PEPM-2006-ThompsonM #partial evaluation

Bit-level partial evaluation of synchronous circuits (ST, AM), pp. 29–37.

CIAA-2006-Hyyro #approximate #automaton #nondeterminism #string

Tighter Packed Bit-Parallel NFA for Approximate String Matching (HH), pp. 287–289.

ICPR-v2-2006-ChengCLF

Bit-pairing Codification for Binary Pattern Projection System (JC, RC, EYL, KSMF), pp. 263–266.

FSE-2006-JhalaM #reasoning

Bit level types for high level reasoning (RJ, RM), pp. 128–140.

ASPLOS-2006-BondM #detection #encoding #memory management #named #online

Bell: bit-encoding online memory leak detection (MDB, KSM), pp. 61–72.

CC-2006-LiuW #architecture #compilation #optimisation #performance #perspective

Performance Characterization of the 64-bit x86 Architecture from Compiler Optimizations’ Perspective (JL, YW), pp. 155–169.

CGO-2006-VenstermansEB #java

Space-Efficient 64-bit Java Objects through Selective Typed Virtual Addressing (KV, LE, KDB), pp. 76–86.

DAC-2005-LeeGML #named #optimisation

MiniBit: bit-width optimization via affine arithmetic (DUL, AAG, OM, WL), pp. 837–840.

DAC-2005-SaneeiAN #encoding #power management #reduction

Sign bit reduction encoding for low power applications (MS, AAK, ZN), pp. 214–217.

DAC-2005-UrardPGMLYG

A 135Mbps DVB-S2 compliant codec based on 64800-bit LDPC and BCH codes (ISSCC paper 24.3) (PU, LP, PG, TM, VL, EY, BG), pp. 547–548.

DAC-2005-WedlerSK #normalisation

Normalization at the arithmetic bit level (MW, DS, WK), pp. 457–462.

SIGMOD-2005-Sedlar #case study #xml

Managing structure in bits & pieces: the killer use case for XML (ES), pp. 818–821.

PLDI-2005-Solar-LezamaRBE #programming #sketching #source code

Programming by sketching for bit-streaming programs (ASL, RMR, RB, KE), pp. 281–294.

STOC-2005-Ajtai #representation

Representing hard lattices with O(n log n) bits (MA), pp. 94–103.

STOC-2005-BenjaminiSW

Balanced boolean functions that can be evaluated so that every input bit is unlikely to be read (IB, OS, DBW), pp. 244–250.

STOC-2005-Holenstein

Key agreement from weak bit agreement (TH), pp. 664–673.

ICALP-2005-PatrascuP #complexity #on the

On Dynamic Bit-Probe Complexity (CEP, MP), pp. 969–981.

CIKM-2005-Hofmann

From bits and bytes to information and knowledge (TH), p. 3.

HPCA-2005-KondoN #clustering #performance #power management

A Small, Fast and Low-Power Register File by Bit-Partitioning (MK, HN), pp. 40–49.

DATE-DF-2004-Horsky #precise

A 16 Bit + Sign Monotonic Precise Current DAC for Sensor Applications (PH), pp. 34–38.

DATE-v1-2004-BhuniaRR #analysis #using

Trim Bit Setting of Analog Filters Using Wavelet-Based Supply Current Analysis (SB, AR, KR), pp. 704–705.

DATE-v2-2004-SogomonyanMOG #self

A New Self-Checking Sum-Bit Duplicated Carry-Select Adder (ESS, DM, VO, MG), pp. 1360–1361.

DATE-2005-SandnerCSHK04 #power management

A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS (CS, MC, AS, TH, FK), pp. 223–226.

ICALP-2004-FlumGW #bound #nondeterminism #parametricity

Bounded Fixed-Parameter Tractability and log2n Nondeterministic Bits (JF, MG, MW), pp. 555–567.

ICPR-v1-2004-ChienL #3d #detection #multi

Skin Color Detection in Low Bit-Rate 3-D Multiwavelet-Based Videos (JCC, CCL), pp. 720–723.

CC-2004-OzerNG #approximate #probability #using

Stochastic Bit-Width Approximation Using Extreme Value Theory for Customizable Processors (EÖ, AN, DG), pp. 250–264.

CGO-2004-Adl-TabatabaiBCEFLMS #java #performance

Improving 64-Bit Java IPF Performance by Compressing Heap References (ARAT, JB, MC, ME, JF, BTL, BRM, JMS), pp. 100–110.

LCTES-2004-ZhuangP #embedded #power management

Power-efficient prefetching via bit-differential offset assignment on embedded processors (XZ, SP), pp. 67–77.

DAC-2003-LiYRP #generative #markov #using

A scan BIST generation method using a markov source and partial bit-fixing (WL, CY, SMR, IP), pp. 554–559.

DAC-2003-SengerMMGKGB

A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference (RMS, EDM, MSM, FHG, KLK, MRG, RBB), pp. 520–525.

DATE-2003-NicolaidisAB #configuration management #self

Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair (MN, NA, SB), pp. 10590–10595.

DATE-2003-RettbergZBL #architecture #embedded #pipes and filters #self

A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems (AR, MCZ, CB, TL), pp. 11130–11131.

LCTES-2003-Krishnaswamy #performance #using

Enhancing the performance of 16-bit code using augmenting instructions (AK, RG), pp. 254–264.

DAC-2002-VandenbusscheULSG #design

Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter (JV, KU, EL, MS, GGEG), pp. 449–454.

DATE-2002-HalambiSBDN #compilation #performance #reduction #using

An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs (AH, AS, PB, NDD, AN), pp. 402–408.

DATE-2002-VandenbusscheLUSG #design

Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter (JV, EL, KU, MS, GGEG), pp. 357–361.

DLT-2002-UmeoK #automaton #communication #infinity #realtime #sequence

An Infinite Prime Sequence Can Be Generated in Real-Time by a 1-Bit Inter-cell Communication Cellular Automaton (HU, NK), pp. 339–348.

ICPR-v3-2002-Ishii #bound #design #people

Tangible Bits: Designing the Boundary between People, Bits, and Atoms (HI), p. 277.

KDD-2002-WuF #performance #scalability

Making every bit count: fast nonlinear axis scaling (LW, CF), pp. 664–669.

SIGIR-2002-FranzM #how #question

How Many Bits are Needed to Store Term Frequencies? (MF, JSM), pp. 377–378.

ECOOP-2002-Filman #encoding

Polychotomic Encoding: A Better Quasi-Optimal Bit-Vector Encoding of Tree Hierarchies (REF), pp. 545–561.

CC-2002-GuptaMZ #analysis #optimisation #representation

A Representation for Bit Section Based Analysis and Optimization (RG, EM, YZ), pp. 62–77.

SAT-2002-AchlioptasM

A bit of abstinence (provably) promotes satisfaction (DA, CM), p. 25.

ASE-2001-Albin-AmiotCGJ #design pattern #detection

Instantiating and Detecting Design Patterns: Putting Bits and Pieces Together (HAA, PC, YGG, NJ), pp. 166–173.

DAC-2001-KarriWMK #concurrent #detection #fault #symmetry

Concurrent Error Detection of Fault-Based Side-Channel Cryptanalysis of 128-Bit Symmetric Block Ciphers (RK, KW, PM, YK), pp. 579–585.

DAC-2001-KedingCLM #performance #simulation

Fast Bit-True Simulation (HK, MC, OL, HM), pp. 708–713.

DAC-2001-KimZP #multi

A True Single-Phase 8-bit Adiabatic Multiplier (SK, CHZ, MCP), pp. 758–763.

DATE-2001-DasguptaCNKC #abstraction #component #linear

Abstraction of word-level linear arithmetic functions from bit-level component descriptions (PD, PPC, AN, SK, AC), pp. 4–8.

DATE-2001-RioRMPR #design #top-down

Top-down design of a xDSL 14-bit 4MS/s sigma-delta modulator in digital CMOS technology (RdR, JLdlR, FM, MBPV, ÁRV), pp. 348–352.

DATE-2001-VandersteenWRSDEB #estimation #multi #performance

Efficient bit-error-rate estimation of multicarrier transceivers (GV, PW, YR, JS, SD, ME, IB), pp. 164–168.

CIAA-2001-BergeronH #algorithm

Cascade Decompositions are Bit-Vector Algorithms (AB, SH), pp. 13–26.

CIAA-2001-Holub #automaton #nondeterminism #parallel #simulation

Bit Parallelism — NFA Simulation (JH), pp. 149–160.

ECOOP-2001-RaynaudT #encoding #performance #testing

A Quasi Optimal Bit-Vector Encoding of Tree Hierarchies. Application to Efficient Type Inclusion Tests (OR, ET), pp. 165–180.

DAC-2000-BrandoleseFSS #energy #estimation

An instruction-level functionally-based energy estimation model for 32-bits microprocessors (CB, WF, FS, DS), pp. 346–351.

DAC-2000-PlasVDBGS #design

Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter (GVdP, JV, WD, AvdB, GGEG, WMCS), pp. 452–457.

STOC-2000-AharonovTVY #quantum

Quantum bit escrow (DA, ATS, UVV, ACCY), pp. 705–714.

STOC-2000-OrlinSS #combinator #optimisation #precise

epsilon-optimization schemes and L-bit precision: alternative perspectives in combinatorial optimization (extended abstract) (JBO, ASS, SS), pp. 565–572.

ICALP-2000-AkhaviV #algorithm

Average Bit-Complexity of Euclidean Algorithms (AA, BV), pp. 373–387.

ICPR-v3-2000-RuizMMRL #algorithm #multi

New Algorithm for Searching Minimum Bit Rate Wavelet Representations with Application to Multiresolution-Based Perceptual Audio Coding (NR, DM, RM, MR, FL), pp. 3290–3293.

CADE-2000-Seger #float #model checking #proving #theorem proving

Connecting Bits with Floating-Point Numbers: Model Checking and Theorem Proving in Practice (CJHS), p. 235.

DAC-1999-ParkC #scheduling

Performance-Driven Scheduling with Bit-Level Chaining (SP, KC), pp. 286–291.

DATE-1999-MaurerS #performance #simulation

Software Bit-Slicing: A Technique for Improving Simulation Performance (PMM, WJS), pp. 786–787.

DATE-1999-RayaneVN #detection #embedded

A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection (IR, JVM, MN), p. 792–?.

STOC-1999-DinitzMR #complexity #symmetry

Bit Complexity of Breaking and Achieving Symmetry in Chains and Rings (Extended Abstract) (YD, SM, SR), pp. 265–274.

IFM-1999-Grosse-Rhode #algebra #comparison #composition #protocol #specification

A Compositional Comparison of Specifications of the Alternating Bit Protocol in CCS and UNITY Based on Algebra Transformation Systems (MGR), pp. 253–272.

HPCA-1999-GatlinC #memory management #performance

Memory Hierarchy Considerations for Fast Transpose and Bit-Reversals (KSG, LC), pp. 33–42.

DAC-1998-BarrettDL

A Decision Procedure for Bit-Vector Arithmetic (CWB, DLD, JRL), pp. 522–527.

TACAS-1998-BjornerP

Deiding Fixed and Non-fixed Size Bit-vectors (NB, MCP), pp. 376–392.

WRLA-1998-StegglesK #case study #logic #protocol #semantics

A timed rewriting logic semantics for SDL: A case study of alternating bit protocol (LJS, PK), pp. 83–104.

STOC-1998-BabaiHK #communication #complexity #cost analysis

The Cost of the Missing Bit: Communication Complexity with Help (LB, TPH, PGK), pp. 673–682.

STOC-1998-BeigelH

One Help Bit Doesn’t Help (RB, TH), pp. 124–130.

ICPR-1998-FalzonM #image

Low bit rate image coding over bases (FF, SM), pp. 1260–1263.

ISMM-1998-RothW

One-Bit Counts between Unique and Sticky (DJR, DSW), pp. 49–56.

ISMM-1998-WallaceR #functional #lazy evaluation

The Bits Between The Lambdas: Binary Data in a Lazy Functional Language (MW, CR), pp. 107–117.

EDTC-1997-BolchiniSS #design #network #novel

A novel methodology for designing TSC networks based on the parity bit code (CB, FS, DS), pp. 440–444.

ICFP-1997-Draves #implementation

Implementing Bit-addressing with Specialization (SD), pp. 239–250.

CHI-1997-IshiiU #interface #people #towards

Tangible Bits: Towards Seamless Interfaces between People, Bits and Atoms (HI, BU), pp. 234–241.

CAV-1997-CyrlukMR #formal method #performance

An Efficient Decision Procedure for the Theory of Fixed-Sized Bit-Vectors (DC, MOM, HR), pp. 60–71.

DAC-1996-Bryant #analysis

Bit-Level Analysis of an SRT Divider Circuit (REB), pp. 661–665.

STOC-1996-HromkovicS #communication #nondeterminism

Nondeterministic Communication with a Limited Number of Advice Bits (JH, GS), pp. 551–560.

ICALP-1996-Miltersen #bound #multi

Lower Bounds for Static Dictionaries on RAMs with Bit Operations But No Multiplication (PBM), pp. 442–453.

HPCA-1996-YangSD #parallel #query

Parallel Intersecting Compressed Bit Vectors in a High Speed Query Server for Processing Postal Addresses (WjY, RS, VD), pp. 232–241.

STOC-1995-FeigeK #proving #random

Impossibility results for recycling random bits in two-prover proof systems (UF, JK), pp. 457–468.

ICALP-1995-BlundoSPV #on the #random

On the Number of Random Bits in Totally Private Computation (CB, ADS, GP, UV), pp. 171–182.

SOSP-1995-TalluriHK

A New Page Table for 64-bit Address Spaces (MT, MDH, YYAK), pp. 184–200.

PLDI-1994-SrivastavaW #architecture #optimisation

Link-Time Optimization of Address Calculation on a 64-bit Architecture (AS, DWW), pp. 49–60.

CAV-1993-KurshanL #multi #verification

Verification of a Multiplier: 64 Bits and Beyond (RPK, LL), pp. 166–179.

OOPSLA-1992-ChaseLLB #lightweight #operating system

Lightweight Shared Objects in a 64-Bit Operating System (JSC, HML, EDL, MBH), pp. 397–413.

SOSP-WIP-1991-ChaseBLL92 #architecture #named

Opal: A Single Address Space System for 64-Bit Architectures (Abstract) (JSC, MBH, HML, EDL), p. 9.

ICALP-1990-PanR #multi #on the

On the Bit-Complexity of Discrete Solutions of PDEs: Compact Multigrid (VYP, JHR), pp. 612–625.

SIGIR-1990-BooksteinK #graph

Construction of Optimal Graphs for Bit-Vector Compression (AB, STK), pp. 327–342.

SIGIR-1986-ChouekaFKS #documentation #retrieval

Improved Hierarchical Bit-Vector Compression in Document Retrieval Systems (YC, ASF, STK, ES), pp. 88–96.

VLDB-1985-WongLORW

Bit Transposed Files (HKTW, HFL, FO, DR, LW), pp. 448–457.

DAC-1984-PerskyT #multi

Topological routing of multi-bit data buses (GP, LVT), pp. 679–682.

VLDB-1984-Tanaka #algorithm

Bit-Sliced VLSI Algorithm for Search and Sort (YT), pp. 225–234.

STOC-1984-KannanLL #algebra #polynomial

Polynomial Factorization and Nonrandomness of Bits of Algebraic and Some Transcendental Numbers (RK, AKL, LL), pp. 191–200.

STOC-1983-Ben-OrCS #encryption #on the #security

On the Cryptographic Security of Single RSA Bits (MBO, BC, AS), pp. 421–430.

DAC-1982-KangKL #adaptation #cpu #design #evolution #layout #logic #matrix #random

Gate matrix layout of random control logic in a 32-bit CMOS CPU chip adaptable to evolving logic design (SMK, RHK, HFSL), pp. 170–174.

DAC-1981-BlankSC #algorithm #architecture #parallel

A parallel bit map processor architecture for DA algorithms (TB, MS, WMvC), pp. 837–845.

SOSP-1981-BabaogluJ #architecture

Converting a Swap-Based System to do Paging in an Architecture Lacking Page-Reference Bits (ÖB, WNJ), pp. 78–86.

DAC-1980-Wilmore #representation

A hierarchical bit-map format for the representation of IC mask data (JAW), pp. 585–589.